MC68HC908EY16 Datasheet, PDF (206/278 Pages) Motorola, Inc – Microcontrollers

Timer Interface A (TIMA) Module
TOVx — Toggle-On-Overflow Bit
When channel x is an output compare channel, this read/write bit controls the behavior of the channel x
output when the TIMA counter overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
1 = Channel x pin toggles on TIMA counter overflow.
0 = Channel x pin does not toggle on TIMA counter overflow.
NOTE
When TOVx is set, a TIMA counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
When the TOVx bit is at 1 and clear output on compare is selected, setting the CHxMAX bit forces the
duty cycle of buffered and unbuffered PWM signals to 100 percent. As Figure 17-8 shows, the
CHxMAX bit takes effect in the cycle after it is set or cleared. The output stays at 100 percent duty
cycle level until the cycle after CHxMAX is cleared.
NOTE
The PWM 100 percent duty cycle is defined as output high all of the time.
To generate the 100 percent duty cycle, use the CHxMAX bit in the TSCx
register. The PWM 0 percent duty cycle is defined as output low all of the
time. To generate the 0 percent duty cycle, select clear output on compare
and then clear the TOVx bit (CHxMAX = 0).
OVERFLOW
OVERFLOW
PERIOD
PTEx/TCHx
TOV = 1
OVERFLOW
OVERFLOW
OVERFLOW
CHxMAX
TOV = 0
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 17-8. CHxMAX Latency
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
206
Freescale Semiconductor