MC68HC908EY16 Datasheet, PDF (201/278 Pages) Motorola, Inc – Microcontrollers

I/O Signals
17.7 I/O Signals
Port D shares two of its pins with the TIMA. There is no external clock input to the TIMA prescaler. The
two TIMA channel I/O pins are PTD0/TACH0 and PTD1/TACH1. See Chapter 12 Input/Output (I/O) Ports
(PORTS)
17.7.1 TIMA Channel I/O Pins (PTD0/TACH0, PTD1/TACH1)
Each channel I/O pin is programmable independently as an input capture pin or an output compare pin.
PTD0/TACH0 and PTD1/TACH1 can be configured as buffered output compare or buffered PWM pins.
17.8 I/O Registers
These I/O registers control and monitor TIMA operation:
• TIMA status and control register, TASC
• TIMA control registers, TACNTH–TACNTL
• TIMA counter modulo registers, TAMODH–TAMODL
• TIMA channel status and control registers, TASC0 and TASC1
• TIMA channel registers, TACH0H–TACH0L and TACH1H–TACH1L
17.8.1 TIMA Status and Control Register
The TIMA status and control register (TASC):
• Enables TIMA overflow interrupts
• Flags TIMA overflows
• Stops the TIMA counter
• Resets the TIMA counter
• Prescales the TIMA counter clock
Address: $0020
Bit 7
6
5
4
3
Read: TOF
0
TOIE TSTOP
R
Write: 0
TRST
Reset: 0
0
1
0
0
R
= Reserved
2
1
Bit 0
PS2
PS1
PS0
0
0
0
Figure 17-4. TIMA Status and Control Register (TASC)
TOF — TIMA Overflow Flag Bit
This read/write flag is set when the TIMA counter reaches the modulo value programmed in the TIMA
counter modulo registers. Clear TOF by reading the TIMA status and control register when TOF is set
and then writing a 0 to TOF. If another TIMA overflow occurs before the clearing sequence is complete,
then writing 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF has no effect.
1 = TIMA counter has reached modulo value
0 = TIMA counter has not reached modulo value
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
Freescale Semiconductor
201