MC68HC908EY16 Datasheet, PDF (118/278 Pages) Motorola, Inc – Microcontrollers

Input/Output (I/O) Ports (PORTS)
12.3.2 Data Direction Register B
Data direction register B determines whether each port B pin is an input or an output. Writing a 1 to a
DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0005
Bit 7
DDRB7
0
6
DDRB6
0
5
DDRB5
0
4
DDRB4
0
3
DDRB3
0
2
DDRB2
0
1
DDRB1
0
Bit 0
DDRB0
0
Figure 12-5. Data Direction Register B (DDRB)
DDRB[7:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 12-6 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
DDRBx
PTBx
PTBx
READ PTB ($0001)
Figure 12-6. Port B I/O Circuit
When DDRBx is a 1, reading address $0001 reads the PTBx data latch. When DDRBx is a 0, reading
address $0001 reads the voltage level on the pin. The data latch can always be written, regardless of the
state of its data direction bit. Table 12-2 summarizes the operation of the port B pins.
Table 12-2. Port B Pin Functions
DDRB
Bit
PTB
Bit
I/O Pin
Mode
Accesses to DDRB
Read/Write
0
X
Input, Hi-Z
DDRB[7:0]
1
X
Output
DDRB[7:0]
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
Accesses to PTB
Read
Write
Pin
PTB[7:0]⁽¹⁾
PTB[7:0]
PTB[7:0]
MC68HC908EY16 • MC68HC908EY8 Data Sheet, Rev. 10
118
Freescale Semiconductor