PIC18F2331_07 Datasheet, PDF (94/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
Example 8-3 shows the sequence to do a 16 x 16
unsigned multiply. Equation 8-1 shows the algorithm
that is used. The 32-bit result is stored in four registers,
RES3:RES0.
EQUATION 8-1:
16 x 16 UNSIGNED
MULTIPLICATION
ALGORITHM
RES3:RES0 =
=
ARG1H:ARG1L • ARG2H:ARG2L
(ARG1H • ARG2H • 2¹⁶) +
(ARG1H • ARG2L • 2⁸) +
(ARG1L • ARG2H • 2⁸) +
(ARG1L • ARG2L)
EXAMPLE 8-3:
16 x 16 UNSIGNED
MULTIPLY ROUTINE
MOVF ARG1L, W
MULWF ARG2L
MOVFF
MOVFF
;
MOVF
MULWF
PRODH, RES1
PRODL, RES0
ARG1H, W
ARG2H
MOVFF
MOVFF
;
MOVF
MULWF
PRODH, RES3
PRODL, RES2
ARG1L, W
ARG2H
MOVF PRODL, W
ADDWF RES1, F
MOVF PRODH, W
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
;
MOVF ARG1H, W
MULWF ARG2L
MOVF PRODL, W
ADDWF RES1, F
MOVF PRODH, W
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
Example 8-4 shows the sequence to do a 16 x 16
signed multiply. Equation 8-2 shows the algorithm
used. The 32-bit result is stored in four registers,
RES3:RES0. To account for the sign bits of the argu-
ments, each argument pair’s Most Significant bit (MSb)
is tested and the appropriate subtractions are done.
EQUATION 8-2:
16 x 16 SIGNED
MULTIPLICATION
ALGORITHM
RES3:RES0
= ARG1H:ARG1L • ARG2H:ARG2L
= (ARG1H • ARG2H • 2¹⁶) +
(ARG1H • ARG2L • 2⁸) +
(ARG1L • ARG2H ² 2⁸) +
(ARG1L • ARG2L)+
(-1 • ARG2H<7> • ARG1H:ARG1L • 2¹⁶) +
(-1 • ARG1H<7> • ARG2H:ARG2L • 2¹⁶)
EXAMPLE 8-4:
16 x 16 SIGNED
MULTIPLY ROUTINE
MOVF ARG1L, W
MULWF ARG2L
MOVFF
MOVFF
;
MOVF
MULWF
PRODH, RES1
PRODL, RES0
ARG1H, W
ARG2H
MOVFF
MOVFF
;
MOVF
MULWF
PRODH, RES3
PRODL, RES2
ARG1L,W
ARG2H
MOVF PRODL, W
ADDWF RES1, F
MOVF PRODH, W
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
;
MOVF ARG1H, W
MULWF ARG2L
MOVF PRODL, W
ADDWF RES1, F
MOVF PRODH, W
ADDWFC RES2, F
CLRF WREG
ADDWFC RES3, F
;
BTFSS ARG2H, 7
BRA SIGN_ARG1
MOVF ARG1L, W
SUBWF RES2
MOVF ARG1H, W
SUBWFB RES3
;
SIGN_ARG1
BTFSS ARG1H, 7
BRA CONT_CODE
MOVF ARG2L, W
SUBWF RES2
MOVF ARG2H, W
SUBWFB RES3
;
CONT_CODE
:
; ARG1L * ARG2L ->
; PRODH:PRODL
;
;
; ARG1H * ARG2H ->
; PRODH:PRODL
;
;
; ARG1L * ARG2H ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
;
; ARG1H * ARG2L ->
; PRODH:PRODL
;
; Add cross
; products
;
;
;
; ARG2H:ARG2L neg?
; no, check ARG1
;
;
;
; ARG1H:ARG1L neg?
; no, done
;
;
;
DS39616C-page 92
Preliminary
© 2007 Microchip Technology Inc.