PIC18F2331_07 Datasheet, PDF (102/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
REGISTER 9-6: PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
PTIF
IC3DRIF
IC2QEIF
IC1IF
bit 7
R/W-0
TMR5IF
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
PTIF: PWM Time Base Interrupt bit
1 = PWM time base matched the value in the PTPER registers. Interrupt is issued according to the
postscaler settings. PTIF must be cleared in software.
0 = PWM time base has not matched the value in the PTPER registers
IC3DRIF: IC3 Interrupt Flag/Direction Change Interrupt Flag bit
IC3 Enabled (CAP3CON<3:0>):
1 = TMR5 value was captured by the active edge on CAP3 input (must be cleared in software)
0 = TMR5 capture has not occurred
QEI Enabled (QEIM<2:0>):
1 = Direction of rotation has changed (must be cleared in software)
0 = Direction of rotation has not changed
IC2QEIF: IC2 Interrupt Flag/QEI Interrupt Flag bit
IC2 Enabled (CAP2CON<3:0>):
1 = TMR5 value was captured by the active edge on CAP2 input (must be cleared in software)
0 = TMR5 capture has not occurred
QEI Enabled (QEIM<2:0>):
1 = The QEI position counter has reached the MAXCNT value, or the index pulse, INDX, has been
detected. Depends on the QEI operating mode enabled. Must be cleared in software.
0 = The QEI position counter has not reached the MAXCNT value or the index pulse has not been
detected
IC1 Enabled (CAP1CON<3:0>):
1 = TMR5 value was captured by the active edge on CAP1 input (must be cleared in software)
0 = TMR5 capture has not occurred
QEI Enabled (QEIM<2:0>), Velocity Measurement mode Enabled (VELM = 0 in QEICON register):
1 = Timer5 value was captured by the active velocity edge (based on PHA or PHB input). CAP1REN
bit must be set in CAP1CON register. IC1IF must be cleared in software.
0 = Timer5 value was not captured by the active velocity edge
TMR5IF: Timer5 Interrupt Flag bit
1 = Timer5 time base matched the PR5 value (must be cleared in software)
0 = Timer5 time base did not match the PR5 value
DS39616C-page 100
Preliminary
© 2007 Microchip Technology Inc.