PIC18F2331_07 Datasheet, PDF (319/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
NEGF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Negate f
[ label ] NEGF
0 ≤ f ≤ 255
a ∈ [0,1]
(f)+1→f
N, OV, C, DC, Z
f [,a]
0110 110a ffff ffff
Location ‘f’ is negated using two’s
complement. The result is placed in the
data memory location ‘f’. If ‘a’
is ‘0’, the Access Bank will be selected,
overriding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value.
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write
register ‘f’
Example:
NEGF REG, 1
Before Instruction
REG = 0011 1010 [0x3A]
After Instruction
REG = 1100 0110 [0xC6]
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
No Operation
[ label ] NOP
None
No operation
None
0000
1111
0000
xxxx
No operation.
1
1
0000
xxxx
0000
xxxx
Q2
No
operation
Q3
No
operation
Q4
No
operation
Example:
None.
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 317