PIC18F2331_07 Datasheet, PDF (175/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 16-9:
TCY
QEI INPUTS WHEN SAMPLED BY THE FILTER (DIVIDE RATIO = 1:1)
QEA Pin
QEB Pin
TQEI = 16 TCY⁽¹⁾
QEA Input
QEB Input
TGD = 3 TCY
Note 1: The module design allows a quadrature frequency of up to FQEI = FCY/16.
FIGURE 16-10:
QEI MODULE RESET TIMING ON PERIOD MATCH
Forward
Reverse
QEA
QEB
Count (+/-) +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1
POSCNT⁽¹⁾
-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
MAXCNT
MAXCNT=1527
IC2QEIF
UP/DOWN
Position
Counter Load
IC3DRIF
Note 2
Q4⁽³⁾
Q1⁽⁴⁾
Note 6
Note 2
Q4⁽³⁾
Q1⁽⁵⁾
Q1⁽⁵⁾
Note 1: POSCNT register is shown in QEI x4 Update mode (POSCNT increments on every rising and every falling edge of
QEA and QEB input signals). Asynchronous external QEA and QEB inputs are synchronized to TCY clock by the
input sampling FF in the noise filter (see Figure 16-14).
2: When POSCNT = MAXCNT, POSCNT is reset to ‘0’ on the next QEA rising edge. POSCNT is set to MAXCNT when
POSCNT = 0 (when decrementing), which occurs on the next QEA falling edge.
3: IC2QEIF is generated on Q4 rising edge.
4: Position counter is loaded with ‘0’ (which is a rollover event in this case) on POSCNT = MAXCNT.
5: Position counter is loaded with MAXCNT value (1527h) on underflow.
6: IC2QEIF must be cleared in software.
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 173