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PIC18F2331_07 Datasheet, PDF (291/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D | |||
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PIC18F2331/2431/4331/4431
23.0 INSTRUCTION SET SUMMARY
The PIC18 instruction set adds many enhancements to
the previous PIC® instruction sets, while maintaining an
easy migration from these PIC instruction sets.
Most instructions are a single program memory word
(16 bits), but there are three instructions that require
two program memory locations.
Each single-word instruction is a 16-bit word divided
into an opcode, which specifies the instruction type and
one or more operands, which further specify the
operation of the instruction.
The instruction set is highly orthogonal and is grouped
into four basic categories:
⢠Byte-oriented operations
⢠Bit-oriented operations
⢠Literal operations
⢠Control operations
The PIC18 instruction set summary in Table 23-2 lists
byte-oriented, bit-oriented, literal and control
operations. Table 23-1 shows the opcode field
descriptions.
Most byte-oriented instructions have three operands:
1. The file register (specified by âfâ)
2. The destination of the result
(specified by âdâ)
3. The accessed memory
(specified by âaâ)
The file register designator âfâ specifies which file
register is to be used by the instruction.
The destination designator âdâ specifies where the result
of the operation is to be placed. If âdâ is â0â, the result is
placed in the WREG register. If âdâ is â1â, the result is
placed in the file register specified in the instruction.
All bit-oriented instructions have three operands:
1. The file register (specified by âfâ)
2. The bit in the file register
(specified by âbâ)
3. The accessed memory
(specified by âaâ)
The bit field designator âbâ selects the number of the bit
affected by the operation, while the file register desig-
nator âfâ represents the number of the file in which the
bit is located.
The literal instructions may use some of the following
operands:
⢠A literal value to be loaded into a file register
(specified by âkâ)
⢠The desired FSR register to load the literal value
into (specified by âfâ)
⢠No operand required
(specified by âââ)
The control instructions may use some of the following
operands:
⢠A program memory address (specified by ânâ)
⢠The mode of the call or return instructions
(specified by âsâ)
⢠The mode of the table read and table write
instructions (specified by âmâ)
⢠No operand required
(specified by âââ)
All instructions are a single word, except for three double
word instructions. These three instructions were made
double word instructions so that all the required informa-
tion is available in these 32 bits. In the second word, the
4 MSbs are â1âs. If this second word is executed as an
instruction (by itself), it will execute as a NOP.
All single-word instructions are executed in a single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP.
The double word instructions execute in two instruction
cycles.
One instruction cycle consists of four oscillator periods.
Thus, for an oscillator frequency of 4 MHz, the normal
instruction execution time is 1 μs. If a conditional test is
true or the program counter is changed as a result of
an instruction, the instruction execution time is 2 μs.
Two-word branch instructions (if true) would take 3 μs.
Figure 23-1 shows the general formats that the
instructions can have.
All examples use the format ânnhâ to represent a hexa-
decimal number, where âhâ signifies a hexadecimal
digit.
The Instruction Set Summary, shown in Table 23-2,
lists the instructions recognized by the Microchip
Assembler (MPASMTM Assembler). Section 23.2
âInstruction Setâ provides a description of each
instruction.
23.1 Read-Modify-Write Operations
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified,
and the result is stored according to either the instruc-
tion or the destination designator âdâ. A read operation
is performed on a register even if the instruction writes
to that register.
For example, a âBCF PORTB, 1â instruction will read
PORTB, clear bit 1 of the data, then write the result back
to PORTB. The read operation would have the unin-
tended result that any condition that sets the RBIF flag
would be cleared. The R-M-W operation may also copy
the level of an input pin to its corresponding output latch.
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 289
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