PIC18F2331_07 Datasheet, PDF (210/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
17.12.3 PWM OUTPUTS WHILE IN FAULT
CONDITION
While in the Fault state (i.e., one or both FLTA and FLTB
inputs are active), the PWM output signals are driven into
their inactive states. The selection of which PWM outputs
are deactivated (while in the Fault state) is determined by
the FLTCON bit in the FLTCONFIG register as follows:
• FLTCON = 1: When FLTA or FLTB is asserted,
the PWM outputs (i.e., PWM<7:0>) are driven into
their inactive state.
• FLTCON = 0: When FLTA or FLTB is asserted, only
PWM<5:0> outputs are driven inactive, leaving
PWM<7:6> activated.
Note:
Disabling only three PWM channels and
leaving one PWM channel enabled when in
the Fault state, allows the flexibility to have
at least one PWM channel enabled. None of
the PWM outputs can be enabled (driven
with the PWM Duty Cycle registers) while
FLTCON = 1 and the Fault condition is
present.
17.12.4 PWM OUTPUTS IN DEBUG MODE
The BRFEN bit in the FLTCONFIG register controls the
simulation of a Fault condition, when a breakpoint is hit,
while debugging the application using an In-Circuit
Emulator (ICE) or an In-Circuit Debugger (ICD). Setting
the BRFEN to high, enables the Fault condition on
breakpoint, thus driving the PWM outputs to the
inactive state. This is done to avoid any continuous
keeping of status on the PWM pin, which may result in
damage of the power devices connected to the PWM
outputs.
If BRFEN = 0, the Fault condition on breakpoint is
disabled.
Note:
It is highly recommended to enable the
Fault condition on breakpoint if a debugging
tool is used while developing the firmware
and high-power circuitry. When the device is
ready to program after debugging the
firmware, the BRFEN bit can be disabled.
DS39616C-page 208
Preliminary
© 2007 Microchip Technology Inc.