PIC18F2331_07 Datasheet, PDF (56/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
TABLE 4-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET Instruction
Stack Resets
Wake-up via WDT
or Interrupt
PTCON0
2331 2431 4331 4431 0000 0000
uuuu uuuu
uuuu uuuu
PTCON1
2331 2431 4331 4431 00-- ----
00-- ----
uu-- ----
PTMRL
2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
PTMRH
2331 2431 4331 4431 ---- 0000
---- 0000
---- uuuu
PTPERL
2331 2431 4331 4431 1111 1111
1111 1111
uuuu uuuu
PTPERH
2331 2431 4331 4431 ---- 1111
---- 1111
---- uuuu
PDC0L
2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
PDC0H
2331 2431 4331 4431 --00 0000
--00 0000
--uu uuuu
PDC1L
2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
PDC1H
2331 2431 4331 4431 --00 0000
--00 0000
--uu uuuu
PDC2L
2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
PDC2H
2331 2431 4331 4431 --00 0000
--00 0000
--uu uuuu
PDC3L
2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
PDC3H
2331 2431 4331 4431 --00 0000
--00 0000
--uu uuuu
SEVTCMPL 2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
SEVTCMPH 2331 2431 4331 4431 ---- 0000
---- 0000
---- uuuu
PWMCON0 2331 2431 4331 4431 -111 0000
-111 0000
-uuu uuuu
PWMCON1 2331 2431 4331 4431 0000 0-00
0000 0-00
uuuu u-uu
DTCON
2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
FLTCONFIG 2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
OVDCOND 2331 2431 4331 4431 1111 1111
1111 1111
uuuu uuuu
OVDCONS 2331 2431 4331 4431 0000 0000
0000 0000
uuuu uuuu
CAP1BUFH/ 2331 2431 4331 4431
VELRH
xxxx xxxx
uuuu uuuu
uuuu uuuu
CAP1BUFL/ 2331 2431 4331 4431
VELRL
xxxx xxxx
uuuu uuuu
uuuu uuuu
CAP2BUFH/ 2331 2431 4331 4431
POSCNTH
xxxx xxxx
uuuu uuuu
uuuu uuuu
CAP2BUFL/ 2331 2431 4331 4431
POSCNTL
xxxx xxxx
uuuu uuuu
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4: See Table 4-2 for Reset value for specific condition.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
6: Bit 3 of PORTE and LATE are enabled if MCLR functionality is disabled. When not enabled as the PORTE
pin, they are disabled and read as ‘0’. The 28-pin devices have only RE3 on PORTE when MCLR is
disabled.
DS39616C-page 54
Preliminary
© 2007 Microchip Technology Inc.