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PIC18F2331_07 Datasheet, PDF (308/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
PIC18F2331/2431/4331/4431
COMF
Complement f
Syntax:
[ label ] COMF f [,d [,a]]
Operands:
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
Operation:
(f) → dest
Status Affected:
N, Z
Encoding:
0001 11da ffff ffff
Description:
The contents of register ‘f’ are comple-
mented. If ‘d’ is ‘0’, the result is stored in
W. If ‘d’ is ‘1’, the result is stored back in
register ‘f’ (default). If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then the
bank will be selected as per the BSR
value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Decode
Example:
Q2
Read
register ‘f’
COMF
Q3
Process
Data
REG, W
Q4
Write to
destination
Before Instruction
REG = 0x13
After Instruction
REG =
W
=
0x13
0xEC
CPFSEQ
Compare f with W, Skip if f = W
Syntax:
[ label ] CPFSEQ f [,a]
Operands:
0 ≤ f ≤ 255
a ∈ [0,1]
Operation:
(f) – (W),
skip if (f) = (W)
(unsigned comparison)
Status Affected:
None
Encoding:
0110 001a ffff ffff
Description:
Compares the contents of data memory
location ‘f’ to the contents of W by
performing an unsigned subtraction.
If ‘f’ = W, then the fetched instruction is
discarded and a NOP is executed
instead, making this a two-cycle
instruction. If ‘a’ is ‘0’, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ = 1, then the bank will be
selected as per the BSR value (default).
Words:
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Decode
Read
register ‘f’
Process
Data
If skip:
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE
NEQUAL
EQUAL
CPFSEQ REG
:
:
Before Instruction
PC Address =
W
=
REG
=
HERE
?
?
After Instruction
If REG
PC
If REG
PC
= W;
= Address (EQUAL)
≠ W;
= Address (NEQUAL)
DS39616C-page 306
Preliminary
© 2007 Microchip Technology Inc.