PIC18F2331_07 Datasheet, PDF (176/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 16-11:
QEA
QEB
QEI MODULE RESET TIMING WITH THE INDEX INPUT
Forward
Note 2
Note 2
Reverse
Count (+/-)
POSCNT⁽¹⁾
+1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1 +1
-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
MAXCNT
MAXCNT = 1527
INDX
IC2QEIF
UP/DOWN
Position
Counter Load
Note 6
Q4⁽³⁾
Q1⁽⁴⁾
Q4⁽³⁾
Q1⁽⁵⁾
Note 1: POSCNT register is shown in QEI x4 Update mode (POSCNT increments on every rising and every falling edge of
QEA and QEB input signals).
2: When INDX Reset pulse is detected, POSCNT is reset to ‘0’ on the next QEA or QEB edge. POSCNT is set to
MAXCNT when POSCNT = 0 (when decrementing), which occurs on the next QEA or QEB edge. Similar Reset
sequence occurs for the reverse direction except that the INDX signal is recognized on its falling edge. The Reset
is generated on the next QEA or QEB edge.
3: IC2QEIF is enabled for one TCY clock cycle.
4: Position counter is loaded with ‘0000h’ (i.e., Reset) on the next QEA or QEB edge when INDX is high.
5: Position counter is loaded with MAXCNT value (e.g., 1527h) on the next QEA or QEB edge following the INDX
falling edge input signal detect).
6: IC2QEIF must be cleared in software.
DS39616C-page 174
Preliminary
© 2007 Microchip Technology Inc.