PIC18F2331_07 Datasheet, PDF (393/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
OVDCONS (Output State) ........................................ 204
PIE1 (Peripheral Interrupt Enable 1)......................... 101
PIE2 (Peripheral Interrupt Enable 2)......................... 102
PIE3 (Peripheral Interrupt Enable 3)......................... 103
PIR1 (Peripheral Interrupt Request
(Flag) 1) .............................................................. 98
PIR2 (Peripheral Interrupt Request
(Flag) 2) .............................................................. 99
PIR3 (Peripheral Interrupt Request
(Flag) 3) ............................................................ 100
PTCON0 (PWM Timer Control 0) ............................. 186
PTCON1 (PWM Timer Control 1) ............................. 186
PWMCON0 (PWM Control 0) ................................... 187
PWMCON1 (PWM Control 1) ................................... 188
QEICON (QEI Control).............................................. 170
RCON (Reset Control) ........................................ 76, 107
RCSTA (Receive Status and Control)....................... 225
SSPCON (SSP Control)............................................ 215
SSPSTAT (SSP Status)............................................ 214
STATUS...................................................................... 75
STKPTR (Stack Pointer) ............................................. 61
Summary............................................................... 68–71
TRISE ....................................................................... 133
TXSTA (Transmit Status and Control) ...................... 224
T0CON (Timer0 Control)........................................... 135
T1CON (Timer1 Control)........................................... 139
T2CON (Timer2 Control)........................................... 145
T5CON (Timer5 Control)........................................... 147
WDTCON (Watchdog Timer Control) ....................... 281
RESET .............................................................................. 319
Reset................................................................................... 47
Resets ............................................................................... 269
RETFIE ............................................................................. 320
RETLW ............................................................................. 320
RETURN ........................................................................... 321
Return Address Stack ......................................................... 60
Return Stack Pointer (STKPTR) ......................................... 60
Revision History ................................................................ 381
RLCF................................................................................. 321
RLNCF .............................................................................. 322
RRCF ................................................................................ 322
RRNCF ............................................................................. 323
S
S (Start) Bit ....................................................................... 214
SCK................................................................................... 213
SCL ................................................................................... 219
SDI .................................................................................... 213
SDO .................................................................................. 213
Serial Clock (SCK) Pin ...................................................... 213
Serial Data In (SDI) Pin..................................................... 213
Serial Data Out (SDO) Pin ................................................ 213
SETF ................................................................................. 323
Slave Select (SS) Pin........................................................ 213
SLEEP .............................................................................. 324
Sleep
OSC1 and OSC2 Pin States ....................................... 31
Software Simulator (MPLAB SIM)..................................... 332
Special Event Trigger (CAP1 Only) .................................. 168
Special Event Trigger. See Compare (CCP Module).
Special Features of the CPU ............................................ 269
Special Function Registers
Map ............................................................................. 67
SPI Mode (SSP) ............................................................... 213
Associated Registers................................................ 218
Serial Clock .............................................................. 213
Serial Data In............................................................ 213
Serial Data Out ......................................................... 213
Slave Select.............................................................. 213
SS ..................................................................................... 213
SSP
Overview.
TMR2 Output for Clock Shift............................. 145, 146
SSPEN Bit ........................................................................ 215
SSPM<3:0> Bits ............................................................... 215
SSPOV Bit ........................................................................ 215
Stack Full/Underflow Resets............................................... 61
SUBFWB .......................................................................... 324
SUBLW ............................................................................. 325
SUBWF............................................................................. 325
SUBWFB .......................................................................... 326
SWAPF ............................................................................. 326
Synchronous Serial Port. See SSP
T
TABLAT Register................................................................ 80
Table Pointer Operations (table)......................................... 80
Table Reads/Table Writes .................................................. 65
TBLPTR Register................................................................ 80
TBLRD .............................................................................. 327
TBLWT ............................................................................. 328
Time-out in Various Situations (table)................................. 49
Time-out Sequence ............................................................ 49
Timer0 .............................................................................. 135
Associated Registers................................................ 137
Clock Source Edge Select (T0SE Bit) ...................... 137
Clock Source Select (T0CS Bit) ............................... 137
Interrupt .................................................................... 137
Operation.................................................................. 137
Prescaler .................................................................. 137
Switching Assignment ...................................... 137
Prescaler. See Prescaler, Timer0.
16-Bit Mode Timer Reads and Writes ...................... 137
Timer1 .............................................................................. 139
Associated Registers................................................ 143
Interrupt .................................................................... 142
Operation.................................................................. 140
Oscillator........................................................... 139, 141
Layout Considerations...................................... 141
Overflow Interrupt ..................................................... 139
Resetting, Using a Special Event Trigger
Output (CCP).................................................... 142
Special Event Trigger (CCP) .................................... 155
TMR1H Register....................................................... 139
TMR1L Register ....................................................... 139
Use as a Real-Time Clock (RTC) ............................. 142
16-Bit Read/Write Mode ........................................... 142
Timer2 .............................................................................. 145
Associated Registers................................................ 146
Interrupt .................................................................... 146
Operation.................................................................. 145
Postscaler. See Postscaler, Timer2.
Prescaler. See Prescaler, Timer2.
PR2 Register ............................................................ 145
SSP Clock Shift ................................................ 145, 146
TMR2 Register ......................................................... 145
TMR2 to PR2 Match Interrupt........................... 145, 157
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 391