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PIC18F2331_07 Datasheet, PDF (299/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D | |||
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PIC18F2331/2431/4331/4431
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
AND W with f
[ label ] ANDWF f [,d [,a]]
0 ⤠f ⤠255
d â [0,1]
a â [0,1]
(W) .AND. (f) â dest
N, Z
0001 01da ffff ffff
The contents of W are ANDed with
register âfâ. If âdâ is â0â, the result is stored
in W. If âdâ is â1â, the result is stored back
in register âfâ (default). If âaâ is â0â, the
Access Bank will be selected. If âaâ is â1â,
the BSR will not be overridden (default).
1
1
Q2
Read
register âfâ
Q3
Process
Data
Q4
Write to
destination
Example:
ANDWF
Before Instruction
W
= 0x17
REG = 0xC2
After Instruction
W
=
REG =
0x02
0xC2
REG, W
BC
Branch if Carry
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If Jump:
Q1
Decode
No
operation
If No Jump:
Q1
Decode
[ label ] BC n
-128 ⤠n ⤠127
if Carry bit is â1â,
(PC) + 2 + 2n â PC
None
1110 0010 nnnn nnnn
If the Carry bit is â1â, then the program
will branch.
The 2âs complement number â2nâ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
Q2
Read literal
ânâ
No
operation
Q3
Process
Data
No
operation
Q4
Write to
PC
No
operation
Q2
Read literal
ânâ
Q3
Process
Data
Q4
No
operation
Example:
HERE
Before Instruction
PC
=
After Instruction
If Carry
=
PC
=
If Carry
=
PC
=
BC JUMP
address (HERE)
1;
address
0;
address
(JUMP)
(HERE + 2)
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 297
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