PIC18F2331_07 Datasheet, PDF (171/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
16.2 Quadrature Encoder Interface
The Quadrature Encoder Interface (QEI) decodes
speed and motion sensor information. It can be used in
any application that uses a quadrature encoder for
feedback. The interface implements these features:
• Three QEI inputs: two phase signals (QEA and
QEB) and one index signal (INDX)
• Direction of movement detection with a direction
change interrupt (IC3DRIF)
• 16-bit up/down position counter
• Standard and High-Precision Position Tracking
modes
• Two Position Update modes (x2 and x4)
• Velocity measurement with a programmable
postscaler for high-speed velocity measurement
• Position counter interrupt (IC2QEIF in the PIR3
register)
• Velocity control interrupt (IC1IF in the PIR3
register)
The QEI submodule has three main components: the
QEI control logic block, the position counter and
velocity postscaler.
The QEI control logic detects the leading edge on the
QEA or QEB phase input pins and generates the count
pulse, which is sent to the position counter logic. It also
samples the index input signal (INDX) and generates
the direction of the rotation signal (up/down) and the
velocity event signals.
The position counter acts as an integrator for tracking
distance traveled. The QEA and QEB input edges
serve as the stimulus to create the input clock which
advances the Position Counter register (POSCNT).
The register is incremented on either the QEA input
edge, or the QEA and QEB input edges, depending on
the operating mode. It is reset either by a rollover on
match to the Period register, MAXCNT, or on the
external index pulse input signal (INDX). An interrupt is
generated on a reset of POSCNT if the position counter
interrupt is enabled.
The velocity postscaler down samples the velocity
pulses used to increment the velocity counter by a
specified ratio. It essentially divides down the number
of velocity pulses to one output per so many inputs,
preserving the pulse width in the process.
A simplified block-diagram of the QEI module is shown
in Figure 16-8.
FIGURE 16-8:
QEI BLOCK DIAGRAM
QEI Module
Direction Change
Timer Reset
Velocity Event
Set CHGIF
Postscaler
CAP3/QEB
CAP2/QEA
CAP1/INDX
Filter
Filter
Filter
QEB
QEA
INDX
Direction
Clock
QEI
Control
Logic
CAP2BUF/POSCNT
Comparator
CAP3BUF/MAXCNT
Position Counter
Reset Timer5
Velocity Capture
8
Set UP/DOWN
8
Reset on Match
Set IC2QEIF
8
8
8
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 169