PIC18F2331_07 Datasheet, PDF (131/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
FIGURE 10-26: BLOCK DIAGRAM OF RD1
PORT/SPI Mode & SSPMX Select
SDO Data Out
0
RD LATD
1
Data Bus
WR LATD
or PORTD
D
Q
CK Q
Data Latch
WR TRISD
D
Q
CK Q
TRIS Latch
RD TRISD
RD PORTD
Q
D
EN
VDD
P
N
VSS
Schmitt
Trigger
RD1 Pin
Note 1: The SDO output is multiplexed by the SSPMX bit in the Configuration register.
FIGURE 10-27: BLOCK DIAGRAM OF RD0
Data Bus
WR LATD
or PORTD
WR TRISD
RD LATD
D
Q
CK Q
Data Latch
D
Q
CK Q
TRIS Latch
VDD
P
RD0 Pin
N
VSS
RD TRISD
RD PORTD
Q
D
EN
Schmitt
Trigger
SSPMX⁽¹⁾
T0CKI/T5CKI Input
Note 1: T0CKI/T5CKI are multiplexed by the SSPMX bit in the Configuration register.
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 129