PIC18F2331_07 Datasheet, PDF (61/400 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D

PIC18F2331/2431/4331/4431
5.0 MEMORY ORGANIZATION
There are three memory types in enhanced MCU
devices. These memory types are:
• Program Memory
• Data RAM
• Data EEPROM
Data and program memory use separate busses,
which allows for concurrent access of these types.
Additional detailed information for Flash program mem-
ory and data EEPROM is provided in Section 6.0
“Flash Program Memory” and Section 7.0 “Data
EEPROM Memory”, respectively.
FIGURE 5-1:
PROGRAM MEMORY MAP
AND STACK FOR
PIC18F2331/4331
PC<20:0>
CALL,RCALL,RETURN
21
RETFIE,RETLW
Stack Level 1
•
•
•
Stack Level 31
Reset Vector LSb
000000h
High-Priority Interrupt Vector LSb ^000008h
Low-Priority Interrupt Vector LSb ^000018h
On-Chip Flash
Program Memory
001FFFh
002000h
Unused
Read ‘0’s
5.1 Program Memory Organization
A 21-bit program counter is capable of addressing the
2-Mbyte program memory space. Accessing a location
between the physically implemented memory and the
2-Mbyte address will cause a read of all ‘0’s (a NOP
instruction).
The PIC18F2331/4331 devices each have 8 Kbytes of
Flash memory and can store up to 4,096 single-word
instructions.
The PIC18F2431/4431 devices each have 16 Kbytes
of Flash memory and can store up to 8,192 single-word
instructions.
The Reset vector address is at 000000h and the
interrupt vector addresses are at 000008h and
000018h.
The program memory maps for PIC18F2331/4331 and
PIC18F2431/4431 devices are shown in Figure 5-1
and Figure 5-2, respectively.
FIGURE 5-2:
PROGRAM MEMORY MAP
AND STACK FOR
PIC18F2431/4431
PC<20:0>
CALL,RCALL,RETURN
21
RETFIE,RETLW
Stack Level 1
•
•
•
Stack Level 31
Reset Vector LSb
000000h
High-Priority Interrupt Vector LSb ^000008h
Low-Priority Interrupt Vector LSb ^000018h
On-Chip Flash
Program Memory
003FFFh
004000h
Unused
Read ‘0’s
1FFFFFh
1FFFFFh
© 2007 Microchip Technology Inc.
Preliminary
DS39616C-page 59