82378ZB Datasheet, PDF (49/137 Pages) Intel Corporation – SYSTEM I/O APIC(SIO.A) AND

E
82378ZB (SIO) AND 82379 (SIO.A)
Bit
Description
6:4 Reserved: Read as 0's.
3:0 IRQx# Routing Bits: These bits specify which IRQ signal to generate.
Bits[3:0]
0000
0001
0010
0011
0100
0101
IRQx#
Reserved
Reserved
Reserved
IRQ3
IRQ4
IRQ5
Bits[3:0]
0110
0111
1000
1001
1010
1011
IRQx#
IRQ6
IRQ7
Reserved
IRQ9
IRQ10
IRQ11
Bits[3:0]
1100
1101
1110
1111
IRQx#
IRQ12
Reserved
IRQ14
IRQ15
3.1.26. PACC—PIC/APIC CONFIGURATION CONTROL REGISTER (82379AB Only)
Address Offset:
Default Value:
Attribute:
70h
00h
Write Only
The PAC Register controls the operation of the INT signal in APIC/PIC configuration and the routing of the
System Management Interrupt (SMI).
Bit
Description
7:2 Reserved
1 SMI Routing Control (SMIRC): 1=SMI routed via the APIC; 0=SMI routed via the SMI# signal. When
SMRC=1, INT can not be routed through the APIC, since it is sharing the APIC interrupt input with SMI.
0 INT Routing Control (INTRC): When APIC is enabled (in mixed or pure APIC mode), this bit allows the
82379AB's external INT signal to be masked (forces INT to the inactive state but does not tri-states the
signal). Thus, the CPU's INT pin can be used (by providing a simple -gate) for the APIC Local Interrupt
(LINTRx). However, INT must not be masked via this bit when APIC is disabled and INT is the only
mechanism to signal the 8259 recognized interrupts to the CPU. When INTRC=1, INT is disabled (APIC
must be enabled). When INTRC=0, INT is enabled.
3.1.27. APICBASE—APIC BASE ADDRESS RELOCATION (82379AB Only)
Address Offset:
Default Value:
Attribute:
71h
00h
Write Only
The APICBASE Register provides the modifier for the APIC base address. APIC is mapped in the CPU memory
space at the locations FEC0_xy00h and FEC0_xy10h (x=0-Fh, y=0,4,8,Ch). The value of 'y' is defined by bits
[1:0] and value of 'x' is defined by bits [5:2]. Thus, the relocation register provides a 1 Kbyte address granularity
(i.e., potentially up to 64 I/O APICs can be uniformly addresses in the memory space). The default value of 00h
provides APIC unit mapping at the addresses FEC00000h and FEC00010h.
Bit
Description
7:6 Reserved
5:2 X-Base Address: Bits[5:2] are compared to host address bits A[15:12], respectively.
1:0 Y-Base Address: Bits[1:0] are compared to host address bits A[11:10], respectively.
49