82378ZB Datasheet, PDF (129/137 Pages) Intel Corporation – SYSTEM I/O APIC(SIO.A) AND

E
82378ZB (SIO) AND 82379 (SIO.A)
The sequence of the ATE test is as follows:
1. Drive TEST and IRQ5 high or TEST high and IRQ6 low.
2. Drive each input and bi-directional pin noted in Section 8.3 high.
3. Starting with the pin farthest from TESTO (SA8 on the 82378ZB and SMI# on the 82379AB), individually drive
each pin low. Expect TESTO to toggle with each pin. Expect each pure output noted in Section 8.3 to toggle
after each corresponding input pin has been driven low.
4. Turn off tester drivers before driving TEST low.
5. Reset the SIO/SIO.A prior to proceeding with further testing.
8.3. NAND Tree Cell Order
Tree Output# Pin #
Table 13. NAND Tree Cell Order for 82378ZB
Pin Name
Notes
14
IRQ4
Reserved
21
TESTO
Test Mode Output
1
11
IRQ5
Cell Closest to TESTO
2
10
SA9
3
9
IRQ6
4
8
SA10
5
7
IRQ7
6
6
SA11
7
5
SA12
8
4
REFRESH#
9
3
SA13
10
207 SA14
11
206 MASTER#
12
205 SA15
13
204 MEMW#
14
203 MEMR#
15
202 SA16
16
201 SA17
17
200 IOR#
18
199 SA18
19
198 IOW#
20
197 SA19
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