82378ZB Datasheet, PDF (112/137 Pages) Intel Corporation – SYSTEM I/O APIC(SIO.A) AND

82378ZB (SIO) AND 82379AB (SIO.A)
E
The binary code formed by the three Encoded Chip Selects determines which Utility Bus device is selected. The
SIO/SIO.A also provides an Encoded Chip Select Enable signal (ECSEN#) that is used to select between the
two external decoders. A zero selects decoder 1 and a one selects decoder 2. The table below shows the
address decode for each of the Utility Bus devices.
Table 8. Encoded Chip Select Summary Table
ECS2 ECS1 ECS0 ECSEN#
Address Decoded
External Chip
Select
Decoder 1
Note Cycle Type
0
0
0
0
70h, 72h, 74, 76h
RTCALE#
I/O W
0
0
1
0
71h, 73h, 75h, 77h
RTCCS#
I/O R/W
0
1
0
0
60h, 62h, 64h, and 66h
(82378ZB)
KEYBRDCS#
I/O R/W
60h and 64h (82379AB)
0
1
1
0
000E0000–000FFFFFh
FFFE0000–FFFFFFFFh
FFF80000–FFFDFFFFh
BIOSCS#
1
MEM R/W
1
0
0
0
3F0h-3F7h (primary)
370h-377h (secondary)
FLOPPYCS# 2
I/O R/W
1
0
1
0
1F0–1F7h (primary)
170–177h (secondary)
IDECS0#
2
I/O R/W
1
1
0
0
3F6–3F7h (primary)
376–377h (secondary)
IDECS1#
2
I/O R/W
1
1
1
0
Reserved
Decoder 2
0
0
0
1
Reserved
0
0
1
1
0C00h
CPAGECS#
3
I/O R/W
0
1
0
1
0800–08FFh
CFIGMEMCS# 3
I/O R/W
0
1
1
1
3F8–3FFh (COM1) -or-
2F8–2FFh (COM2)
COMACS#
4
I/O R/W
1
0
0
1
3F8–3FFh (COM1) -or-
2F8–2FFh (COM2)
COMBCS#
4
I/O R/W
1
0
1
1
3BC–3BFh (LPT1)
378–37Fh (LPT2)
278–27Fh (LPT3)
LPTCS#
5
I/O R/W
1
1
0
1
Reserved
1
1
1
1
Idle State
112