82378ZB Datasheet, PDF (26/137 Pages) Intel Corporation – SYSTEM I/O APIC(SIO.A) AND

82378ZB (SIO) AND 82379AB (SIO.A)
E
Memory
Address
Table 1. Memory Address For Accessing APIC Registers
Mnemonic
Register Name
Type
FEC0 xy00h IOREGSEL
I/O Register Select
R/W
FEC0 xy10h IOWIN
I/O Window
R/W
NOTES:
xy are determined by the x and y fields in the APIC Base Address Relocation Register. Range for x=0-Fh and the range for
y=0,4,8,Ch.
Address Offset
Mnemonic
Table 2. I/O APIC Registers
Register Name
Type
00h
IOAPICID
I/O APIC ID
R/W
01h
IOAPICVER
I/O APIC Version
RO
02h
IOAPICARB
I/O APIC Arbitration ID
RO
10-2Fh
IOREDTBL[0:15]
Redirection Table (Entries 0-15, 63 bits each)
NOTE:
Address Offset is determined by I/O Register Select Bits[7:0].
R/W
Configuration
Offset
Table 3. Configuration Registers
Register
Register Bus Access
Access
00−01h
Vendor Identification
RO
PCI Only
02−03h
Device Identification
RO
PCI Only
04−05h
Command
R/W
PCI Only
06−07h
Device Status
R/W
PCI Only
08h
Revision Identification
RO
PCI Only
09−3Fh
Reserved
--
PCI Only
40h
PCI Control
R/W
PCI Only
41h
PCI Arbiter Control
R/W
PCI Only
42h
PCI Arbiter Priority Control
R/W
PCI Only
43h
PCI Arbiter Priority Control Extension Register
R/W
PCI Only
44h
MEMCS# Control
R/W
PCI Only
45h
MEMCS# Bottom of Hole
R/W
PCI Only
46h
MEMCS# Top of Hole
R/W
PCI Only
47h
MEMCS# Top of Memory
R/W
PCI Only
48h
ISA Address Decoder Control
R/W
PCI Only
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