82378ZB Datasheet, PDF (110/137 Pages) Intel Corporation – SYSTEM I/O APIC(SIO.A) AND

82378ZB (SIO) AND 82379AB (SIO.A)
E
Hardware Solution #2
Generate APICCLK by dividing the PCLK by two. In this case, there will not be an anomaly of APICD1 pulsing
low during the negation of CPURST, as long as PCLK is generated by dividing HCLK by two and APICCLK is
generated by dividing PCLK by two.
This is only viable for designs using the 82379AB. For EISA designs using the 82374EB(SB) ESC, this solution
is invalid. The ESC begins pulsing the APICD1 pin later in time, causing the APICD1 pulse to align with the
falling edge of CPURST for DP EISA systems.
Hardware Solution #3.
Add logic to ensure that PCIRST# remains asserted low until PWROK is valid and then once PWROK is valid,
let PCIRST# become the logical inverse of CPURST. This ensures that the I/O APIC and both CPUs exit reset
simultaneously preventing the I/O APIC from responding to phantom APIC messages.
Possible Implementations:
a. Connect a buffered version of CPURST to an inverter and then connect the output of this inverter to
the input of a three-state buffer. PWROK# is used as the active low enable to the three-state buffer. The
output of this three-state buffer is used as the PCIRST# signal for the entire system. Note that the PCMC
PCIRST# output pin (pin 147) should be disconnected from the system. It is important to use a buffered
version of CPURST and preferably one that already exists in the system due to the critical AC timing of this
signal. A weak pulldown resistor (8.2K, for instance) should be added to the PCIRST# net to ensure it is low
while PWROK is low.
PWORK
CPURST
PC IR ST#
057111
Figure 11. PCIRST# Soln 3a Logic
b. Connect a buffered version of CPURST to an inverter and then connect the output of this inverter to one input
of a two-input AND gate. PWROK is the second input to the AND gate. The output of the AND gate becomes
PCIRST# for the entire system. Again, the PCMC PCIRST# output pin (pin 147) should be disconnected from
the system.
CPURST
PWROK
PCIRST#
057112
Figure 12. PCIRST# Soln 3b Logic
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