82378ZB Datasheet, PDF (108/137 Pages) Intel Corporation – SYSTEM I/O APIC(SIO.A) AND

82378ZB (SIO) AND 82379AB (SIO.A)
E
Note that with the above frequency accuracies, a 15.0 MHz APICCLK with a 50-MHz or 66-MHz HCLK may not
always function correctly under worst-case clock variations in a DP ISA environment. Also, a 16.0-MHz
APICCLK may not function correction with 50MHz, 60MHz or 66MHz under worst-case clock variations.
Sample Calculation:
Two key variables in the system first must be identified:
1. The accuracy of the host clock oscillator input to the PCMC (HCLKOSC) additional inaccuracy in HCLK or
PCI Clock (PCLK) is not induced by the internal PCMC PLLs.
2. The accuracy of the APIC clock oscillator.
The following example assumes a 60-MHz Host Clock (HCLK) frequency with an oscillator accuracy of 0.01%
and a 15.0-MHz APIC Clock (APICCLK) frequency with an accuracy of 0.01%.
STEP 1: Determine the nominal clock frequency for HCLK, PCLK and APICCLK. Also, determine the accuracy
for HCLK and APICCLK. Since PCLK is HCLK/2, no additional inaccuracy is incurred.
Signal
Frequency
Accuracy
HCLK
60 MHz
0.01%
APICCLK
15 MHz
0.01%
STEP 2: Calculate the maximum and minimum window from PCIRST# and CPURST. One less HCLK (66,671)
was used to account for the uncertainty between HCLK and PCLK for the minimum case. This
provides the minimum time window between the I/O APIC responding to the APIC messages and the
falling edge of CPURST.
Convert these two extremes to absolute time (seconds). When converting the maximum HCLK
window to real time be sure to use the max HCLK Period possible due to clock tolerances. Similarly,
use the minimum HCLK period for the min HCLK window.
Equation #1:
(HCLK cycles) * Max HCLK Period = Max HCLK Window
(66,672) * (1.66683335E-08) = 1.111311 msec
(HCLK cycles) * Min HCLK Period = Min HCLK Window
(66,671) * (1.66650002E-08) = 1.111072 msec
APICD1 Pulse Window (s)
Max HCLK window
1.111311E-03
Min HCLK window
1.111072E-03
STEP 3: Determine the equivalent number of APICCLKs contained in the maximum and minimum pulse
windows calculated above. Account for the accuracy of the APICCLK source.
Also, since APICCLK and HCLK are completely asynchronous to each other, one APICCLK should be
subtracted from the minimum window to account for any HCLK/APICCLK misalignment.
Equation #2:
(Max APICD1 pulse window) * (Max APICCLK frequency) = Max APICCLKs
1.111311E-03 * 15.0015 MHz = 16,671.33 APICCLKs
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