82378ZB Datasheet, PDF (3/137 Pages) Intel Corporation – SYSTEM I/O APIC(SIO.A) AND

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82378ZB (SIO) AND 82379 (SIO.A)
CONTENTS
PAGE
1.0. ARCHITECTURAL OVERVIEW.................................................................................................................... 9
2.0. SIGNAL DESCRIPTION............................................................................................................................... 12
2.1. PCI BUS INTERFACE SIGNALS ................................ ................................ ................................ ............. 13
2.2. PCI ARBITER SIGNALS ................................ ................................ ................................ ........................... 14
2.3. ADDRESS DECODER SIGNAL ................................ ................................ ................................ ............... 16
2.4. POWER MANAGEMENT SIGNALS ................................ ................................ ................................ ........ 17
2.5. ISA INTERFACE SIGNALS ................................ ................................ ................................ ...................... 17
2.6. DMA SIGNALS ................................ ................................ ................................ ................................ .......... 19
2.7. TIMER SIGNAL ................................ ................................ ................................ ................................ ......... 20
2.8. INTERRUPT CONTROLLER SIGNALS ................................ ................................ ................................ .. 21
2.9. APIC BUS SIGNALS (82379AB ONLY) ................................ ................................ ................................ .. 22
2.10. UTILITY BUS SIGNALS ................................ ................................ ................................ .......................... 22
2.11. TEST SIGNALS ................................ ................................ ................................ ................................ ....... 24
3.0. REGISTER DESCRIPTION.......................................................................................................................... 25
3.1. SIO CONFIGURATION REGISTER DESCRIPTION ................................ ................................ ............. 32
3.1.1. VID—VENDOR IDENTIFICATION REGISTER ................................ ................................ ............... 32
3.1.2. DID—DEVICE IDENTIFICATION REGISTER ................................ ................................ ................. 33
3.1.3. COM—COMMAND REGISTER ................................ ................................ ................................ ........ 33
3.1.4. DS—DEVICE STATUS REGISTER ................................ ................................ ................................ . 34
3.1.5. RID—REVISION IDENTIFICATION REGISTER ................................ ................................ ............. 34
3.1.6. PCICON—PCI CONTROL REGISTER ................................ ................................ ............................ 35
3.1.7. PAC—PCI ARBITER CONTROL REGISTER ................................ ................................ ................. 36
3.1.8. PAPC—PCI ARBITER PRIORITY CONTROL REGISTER ................................ ............................ 37
3.1.9. ARBPRIX—PCI ARBITER PRIORITY CONTROL EXTENSION REGISTER ............................... 39
3.1.10. MCSCON-MEMCS# CONTROL REGISTER ................................ ................................ ................. 39
3.1.11. MCSBOH—MEMCS# BOTTOM OF HOLE REGISTER ................................ ............................... 40
3.1.12. MCSTOH—MEMCS# TOP OF HOLE REGISTER ................................ ................................ ........ 40
3.1.13. MCSTOM—MEMCS# TOP OF MEMORY REGISTER ................................ ................................ . 41
3.1.14. IADCON—ISA ADDRESS DECODER CONTROL REGISTER ................................ ................... 41
3.1.15. IADRBE—ISA ADDRESS DECODER ROM BLOCK ENABLE REGISTER ............................... 42
3.1.16. IADBOH—ISA ADDRESS DECODER BOTTOM OF HOLE REGISTER ................................ .... 42
3.1.17. IADTOH—ISA ADDRESS DECODER TOP OF HOLE REGISTER ................................ ............ 42
3.1.18. ICRT—ISA CONTROLLER RECOVERY TIMER REGISTER ................................ ..................... 43
3.1.19. ICD—ISA CLOCK DIVISOR REGISTER ................................ ................................ ....................... 44
3.1.20. UBCSA—UTILITY BUS CHIP SELECT A REGISTER ................................ ................................ . 45
3.1.21. UBCSB—UTILITY BUS CHIP SELECT B REGISTER ................................ ................................ . 46
3.1.22. MAR1—MEMCS# ATTRIBUTE REGISTER #1 ................................ ................................ ............ 47
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