82C836 Datasheet, PDF (63/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s Control and Status Registers
Real Time Clock and Internal Timer Registers
Control and Status Registers
The 82C836 contains four registers to control the operation and monitor the status of the
Real Time Clock. These registers are located at index address 0AH-0DH and are
accessible by the CPU at all times
Figure 6-1. Register A----Address 0AH (All Bits Except UIP are Read/Write)
B7 B6 B5 B4 B3 B2 B1 B0
________ ___________________________ ____________________________________
RS Periodic Interrupt Rate
DV Divider Prescaler
UIP Update in Progress
bits: B0-B3 RS
These bits control the periodic interrupt rate. The periodic interrupt
is derived from the divider/prescaler in the Real Time Clock and is
separate from the alarm interrupt. Both the alarm and periodic
interrupts use the same interrupt channel in the interrupt controller.
Use of the periodic interrupt allows the generation of interrupt rates
higher than one per second. Below are the interrupt rates for which
the Real Time Clock may be programmed.
Rate Selection
RS3 RS2 RS1 RS0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
Time Base
4.194304MHz or
1.048576MHz
32.768KHz
None
30.517µs
61.035µs
122.070 µs
244.141 µs
488.281 µs
976.562 µs
1.953125ms
3.90625ms
7.8125ms
15.625ms
31.25ms
62.5ms
125ms
250ms
500ms
None
3.90526ms
7.8125ms
122.070 µs
244.141 µs
488.281 µs
976.562 µs
1.953125ms
3.90625ms
7.8125ms
15.625ms
31.25ms
62.5ms
125ms
250ms
500ms
6-4 Revision 3.0
PRELIMINARY
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