82C836 Datasheet, PDF (132/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s Configuration Registers
82C386 CHIPSet Data Sheet
Port 92H is used as a fast alternative to gating A20 and resetting the CPU, rather than
using the 8042 keyboard controller. This register is compatible with IBM PS/2
architecture.
Table 10-26. Port 92H----System Control
Bit
Name
Description
7-2
----
Reserved.
1
Alt GATEA20
Allows address bit 20 to be compatible with the 8088 and 8086 at address
FFFF:10H and above. Either a 1 in this bit or a high logic level on the
GATEA20 signal from the 8042 causes MODA20 to follow CPU A20.
To force MODA20 low during CPU cycles, this bit must be zero and the
GATEA20 input signal must also be low.
0 = MODA20 is forced low (8088 compatible).
1 = MODA20 follows address bit A20 from CPU.
0
Alt CPU Reset
A 0-to-1 transition causes a reset pulse on the CPURST pin to reset the
CPU. There is a minimum delay of 6.72 microseconds before the reset
pulse begins. This bit retains its state following CPU reset so the BIOS
can determine why the CPU reset occured. The main reason for resetting
the CPU alone is to return from protected mode in an 80286-compatible
manner.
1 0-20 Revision 3.0
PRELIMINARY
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