82C836 Datasheet, PDF (44/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

System Interface
DRAM Interface s
• Single RAS Active (SRA), also known as shared CAS
In this mode, SCATsx provides four RAS signals and only two CAS signals for
controlling up to four DRAM banks. Each CAS drives four half-banks, so the CAS
signals should be buffered in systems having more than two banks. The buffering
adds delay which diminishes worst-case timing margins, particularly in 25MHz
systems. In addition, the sharing of CAS signals between banks means that only one
RAS signal can be allowed to remain active at one time. This adds an extra T-state
when switching between banks (as compared to MRA mode, which can switch banks
in zero wait states if the new bank already has its RAS signal active). The added
T-state represents a significant performance penalty. The only advantage of SRA
mode is that the external 74F153 and 74ALS138 aren’t needed, since the six CAS
signals become DREQs and DACKs, see Figure 5-1. Note: Signal names in
parentheses ( ) refer to SRA mode. Signal names without parentheses refer to MRA
mode.
Figure 5-1. MRA Mode Implementation
DRQ5
DRQ6
DRQ7
DRQ0
DRQ1
DRQ2
DRQ3
DSEL
BA
LL
LH
HL
HH
14
S0
2 _S1
6
5
4
3
1
10
11
12
13
15
I0A
I1A
I2A
I3A
EA
I0B
I1B
I2B
I3B
EB
YA ⁷
YB ⁹
DRQB
(DRQ3)
DRQA
(DRQ2)
+5V
74F153
DSELB
(DRQ0)
DSELA
(DRQ1)
74F153
DRQA
DRQ0
DRQ1
DRQ2
DRQ3
DRQB
DRQ5
DRQ6
DRQ7
GRND
SCATsx
82C836B
*
4.7K
44
46
90
48
* ^{+5V or GRND}
47
45
43
DACKA
DACKB
DACKC
89
134
-DACKEN
(XRST)
(-DACK1)
(-DACK2)
(-DACK3)
1
2
3
A0
A1
A2
+5V
6 _E3
(-DACK0)
5
4
E2
E1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
15
14
13
12
11
10
9
7
74ALS138
*
20K
104
101
100
96
95
94
93
92
91
(-RAS3)
(-CASH)
(-CASL)
(DRQ7)
(-DACK7)
(DRQ6)
(-DACK6)
.
(DRQ5)
(-DACK5)
*
20K
-DACK0
-DACK1
-DACK2
-DACK3
-DACK5
-DACK6
-DACK7
(nc)
+5V
XRST
+5V
20K
-RAS3/MA10
-CAS0H
-CAS0L
-CAS1H
-CAS1L
-CAS2H
-CAS2L
-CAS3H
-CAS3L
DACK
CB
LL
LH
HL
HH
74ALS138
L
-DACK0
-DACK2
-DACK5
-DACK7
DACKA :
H
-DACK1
-DACK3
-DACK6
( none )
-RAS3/MA10
74F244
-RAS3
MA10
Chips and Technologies, Inc.
PRELIMINARY
Revision 3.0 5-3