82C836 Datasheet, PDF (181/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

System Characteristics
AC Characteristics 16- and 20MHz s
Local Bus Access and Cache
The local bus access and cache timing specifications are shown in Tables 12-24
through 12-27.
Table 12-24. Local Bus Access and Cache----Output Responses
Symbol
t342
t343
Parameters
-CAS inactive from -READY rise
-CAS fall from PROCCLK FALL during local
memory write in Early READY mode
16MHz
Min. Max.
1
----
---- *
* Not applicable to 82C836B. 22ns maximum for 82C836A-16. 20ns maximum for 82C836A-20.
20MHz
Min. Max.
1
----
---- *
Table 12-25. Local Bus Access and Cache----Formula Specifications
Symbol
te343
Critical Path
Parity setup in Early READY write
Formula
t112-t343
16MHz
Min. Max.
---- *
* Not applicable to 82C836B. 26ns maximum for 82C836A-16. 14ns maximum for 82C836A-20.
20MHz
Min. Max.
---- *
Table 12-26. Local Bus Access and Cache----Input Requirements
Symbol
t350
t351
t352
t353
Parameters
-LBA setup before PROCCLK rise
-LBA hold after PROCCLK rise
-READY setup before PROCCLK rise during cache
read hit or LBA cycle
-READY hold after PROCCLK rise during cache
read hit or LBA cycle
16MHz
Min. Max.
32 ----
3
----
19 ----
4
----
20MHz
Min. Max.
20 ----
2
----
15 ----
4
----
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