82C836 Datasheet, PDF (119/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

82C386 CHIPSet Data Sheet
Configuration Registers s
Index 49H is used to write protect RAM in the address ranges specified as follows:
1 = Read only
0 = Read/Write
Default for all bits is 0.
Table 10-8. Index 49H----RAM Write Protect
Bit
Description
7
0F8000H-0FFFFFH RAM Read Only
6
0F0000H-0F7FFFH RAM Read Only
5
0E8000H-0EFFFFH RAM Read Only
4
0E0000H-0E7FFFH RAM Read Only
3
0D8000H-0DFFFFH RAM Read Only
2
0D0000H-0D7FFFH RAM Read Only
1
0C8000H-0CFFFFH RAM Read Only
0
0C0000H-0C7FFFH RAM Read Only
Index 4AH controls whether shadow RAM is enabled or disabled in the 16KB address
ranges specified as follows:
1 = Enable RAM
0 = Disable RAM
Default for all bits is 0.
Table 10-9. Index 4AH----Shadow RAM Enable 1
Bit
Description
7
0BC000H-0BFFFFH RAM Enable
6
0B8000H-0BBFFFH RAM Enable
5
0B4000H-0B7FFFH RAM Enable
4
0B0000H-0B3FFFH RAM Enable
3
0AC000H-0AFFFFH RAM Enable
2
0A8000H-0ABFFFH RAM Enable
1
0A4000H-0A7FFFH RAM Enable
0
0A0000H-0A3FFFH RAM Enable
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