82C836 Datasheet, PDF (175/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

System Characteristics
AC Characteristics 16- and 20MHz s
Table 12-10. CPU to AT-Bus, On-board I/O, and ROM----Formula Specifications
Symbol
te133
te137
te139
te145
te145a
Critical Path
ALE width
MODA0 hold after command rise
MEMCS16 setup before ALE fall
Master read, access from CAS
Master read, access from Column
Address
Formula
t133-t134
t136-t137
t139-t134
t145+t102
t145+t107
* 36ns maximum for 82C836A.
** 20ns maximum for 82C836A-20. 29ns maximum for 836A-16.
16MHz
Min. Max.
---- 10
---- 16
---- 24**
---- 38*
---- 34
20MHz
Min. Max.
---- 10
---- 16
---- 15**
---- 38*
---- 34
Table 12-11. CPU to AT-Bus, On-board I/O, and ROM----Input Requirements
Symbol
t160
t161
t162
t163
t164
t165
t166
t167
t168
t169
t170
t171
t173
t174
t175
t176
t177
Parameters
-ADS setup before PROCCLK rise*
-ADS hold after PROCCLK rise*
A0-23 setup before PROCCLK rise ^†
A0-23 hold after PROCCLK rise ^‡
-BHE setup before PROCCLK rise ^†
-BHE hold after PROCCLK rise ^‡
-DC, W/-R and M/-IO setup before PROCCLK rise ^†
-DC, W/-R and M/-IO hold after PROCCLK rise ^‡
IOCHRDY setup before BUSCLK rise ⁺
IOCHRDY hold after BUSCLK rise ⁺
0WS setup before BUSCLK fall ⁺
0WS hold after BUSCLK fall ⁺
-IOCS16 hold after Command inactive
-MEMCS16 setup before ALE fall
-MEMCS16 hold after ALE fall
XD0-15 valid before read command rise
-IOCS16 setup before BUSCLK rise (first BUSCLK
rise after I/O command fall)
16MHz
Min. Max.
24 ----
4
----
57 ----
4
----
39 ----
4
----
39 ----
4
----
20 ----
20 ----
15 ----
25 ----
0
----
33** ----
10 ----
25 ----
0
----
20MHz
Min. Max.
24 ----
4
----
45 ----
4
----
39 ----
4
----
39 ----
4
----
15 ----
15 ----
10 ----
20 ----
0
----
30** ----
10 ----
20 ----
0
----
+ Certain input parameters, as noted, are nonrestrictive. If these parameters are violated, the sign al may not be recognized
until the subsequent clocking period. The parameter specifies only the condition needed to guarante e recognition of the
signal on the particular clock edge.
‡ At end of TS (TS is the T-state in which -ADS changes from low to high).
† At mid-TS.
* At start of TS.
** 28ns maximum for 82C836A at 16MHz. 25ns maximum for 82C836A at 20MHz.
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