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82C836 Datasheet, PDF (52/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT
System Interface
DRAM Interface s
Table 5-6. Memory Configuration Address Ranges and
Interleaving Sequences Encoded RAS Only
Physical Configuration
0F = 4x256KB, 6x1MB
0F = 4x256KB, 6x1MB
0F = 4x256KB, 6x1MB
10 = 4x256KB, 8x1MB
10 = 4x256KB, 8x1MB
10 = 4x256KB, 8x1MB
11 = 4x256KB, 10x1MB
11 = 4x256KB, 10x1MB
11 = 4x256KB, 10x1MB
11 = 4x256KB, 10x1MB
12 = 4x256KB, 12x1MB
12 = 4x256KB, 12x1MB
12 = 4x256KB, 12x1MB
13 = 10x1MB
13 = 10x1MB
14 = 12x1MB
14 = 12x1MB
15 = 14x1MB
15 = 14x1MB
15 = 14x1MB
16 = 16x1MB
16 = 16x1MB
Address Ranges
000000-0FFFFFH
100000-4FFFFFH
500000-6FFFFFH
000000-0FFFFFH
100000-4FFFFFH
500000-8FFFFFH
000000-0FFFFFH
100000-4FFFFFH
500000-8FFFFFH
900000-AFFFFFH
000000-0FFFFFH
100000-4FFFFFH
500000-CFFFFFH
000000-7FFFFFH
800000-9FFFFFH
000000-7FFFFFH
800000-BFFFFFH
000000-7FFFFFH
800000-BFFFFFH
C00000-DFFFFFH
000000-7FFFFFH
800000-FFFFFFH*
* Top 128KB or 256KB accessible only via EMS.
Map Mode
256KW/2WI
1MW/2WI
1MW/P
256KW/2WI
1MW/2WI
1MW/2WI
256KW/2WI
1MW/2WI
1MW/2WI
1MW/P
256KW/2WI
1MW/2WI
1MW/4WI
1MW/4WI
1MW/P
1MW/4WI
1MW/2WI
1MW/4WI
1MW/2WI
1MW/P
1MW/4WI
1MW/4WI
Banks
0, 1
2, 3
4
0, 1
2, 3
4, 5
0, 1
2, 3
4, 5
6
0, 1
2, 3
4-7
0-3
4
0-3
4, 5
0-3
4, 5
6
0-3
4-7
Page Interleave Size
400H
800H
----
400H
800H
800H
400H
800H
800H
----
400H
800H
800H
800H
----
800H
800H
800H
800H
----
800H
800H
Table 5-7. Memory Configuration Address Ranges and
Interleaving Sequences Nonencoded RAS Only
Physical Configuration
17 = 4x256KB, 2x4MB
17 = 4x256KB, 2x4MB
18 = 2x1MB, 2x4MB
18 = 2x1MB, 2x4MB
19 = 4x4MB
Address Ranges
000000-0FFFFFH
100000-8FFFFFH
000000-7FFFFFH
800000-9FFFFFH
000000-FFFFFFH*
* Top 128KB or 256KB accessible only via EMS.
Map Mode
256KW/2WI
4MW/P
4MW/P
1MW/P
4MW/2WI
Banks
0, 1
2
1
0
0, 1
Page Interleave Size
400H
----
----
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1000H
Chips and Technologies, Inc.
PRELIMINARY
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