82C836 Datasheet, PDF (118/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

s Configuration Registers
82C386 CHIPSet Data Sheet
Index Register 47H is reserved.
Index Register 48H determines the address ranges included in the -ROMCS output. The
power-on default address range is 0F0000H-0FFFFFH. The range from FC0000H to
FFFFFFH may also be enabled, depending on ICR 4EH bit 4 and ICR 46H bit 5. The
-DACK7 pin is used during reset to specify the width of the ROM accessed with the
-ROMCS signal. If a 4.7K pull-down is placed on -DACK7, accesses to ROM will
always be 16-bits wide (two ROMs are required), and -MEMCS16 will be asserted for all
ROM cycles. A 4.7K pull-up is needed on -DACK7 for 8-bit wide ROM.
Each bit enables or disables -ROMCS for the address range specified as follows:
1 = Enable ROM
0 = Disable ROM
Do not enable ROM and shadow RAM in the same range at the same time.
Table 10-7. Index 48H----ROM Enable
Bit
Description
7
0F8000H-0FFFFFH ROM Enable. Default = 1
6
0F0000H-0F7FFFH ROM Enable. Default = 1
5
0E8000H-0EFFFFH ROM Enable. Default = 0
4
0E0000H-0E7FFFH ROM Enable. Default = 0
3
0D8000H-0D8FFFH ROM Enable. Default = 0
2
0D0000H-0D7FFFH ROM Enable. Default = 0
1
0C8000H-0CFFFFH ROM Enable. Default = 0
0
0C0000H-0C7FFFH ROM Enable. Default = 0
1 0-6 Revision 3.0
PRELIMINARY
Chips and Technologies, Inc.