82C836 Datasheet, PDF (131/205 Pages) List of Unclassifed Manufacturers – Single-Chip 386sx AT

82C386 CHIPSet Data Sheet
Configuration Registers s
Port 70H is used to access the Real-time Clock (RTC) and its CMOS RAM. It can also
block NMIs from going to the CPU. Bits 6-0 are not used when the external RTC option
is selected.
Table 10-24. Port 70H----RTC/CMOS Index and NMI Mask
Bit
Name
7
NMI MASK
(write only)
6-0
RTC Index
Bits 6:0
Description
This bit masks the generation of NMIs. If an NMI causing condition (see
port 61H) exists at the time this bit is cleared, the NMI is sent to the CPU.
0 = Enable NMI
1 = Inhibit NMI (default)
These bits specify the index (address) for accessing the 128 locations in the
RTC and CMOS RAM (114 user RAM, 14 RTC registers). Port 71H
accesses the indexed location. If an external real-time clock is used, ports
70H and 71H (except port 70H bit 7) are inoperative in the 82C836 and
should be implemented externally.
Port 71H is used to transfer data to and from the internal real-time clock and CMOS
RAM. The RTC register is selected by bits 6:0 of I/O port 70H as described earlier.
Table 10-25. Port 71H----RTC/CMOS Data
Bit
Description
7-0
RTC DATA bits 7:0.
Chips and Technologies, Inc.
PRELIMINARY
Revision 3.0 1 0-1 9