PIC24EP256GU810-I Datasheet, PDF (516/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
FIGURE 32-4:
POWER-ON RESET TIMING CHARACTERISTICS
Power-up Timer Disabled – Clock Sources = (FRC, FRCDIVN, FRCDIV16, FRCPLL, EC, ECPLL and LPRC)
VDD
VPOR
Power-up Sequence
SY00
(TPU)
(Note 1,2)
CPU Starts Fetching Code
Power-up Timer Disabled – Clock Sources = (HS, HSPLL, XT, XTPLL and SOSC)
VDD
VPOR
Power-up Sequence
SY00
(TPU)
(Note 1,2)
SY10
(TOST)
CPU Starts Fetching Code
Power-up Timer Enabled – Clock Sources = (FRC, FRCDIVN, FRCDIV16, FRCPLL, EC, ECPLL and LPRC)
VDD
VPOR
Power-up Sequence
SY00 SY11
(TPU) (TPWRT)
(Note 1,2)
CPU Starts Fetching Code
Power-up Timer Enabled – Clock Sources = (HS, HSPLL, XT, XTPLL and SOSC)
VDD
VPOR
Power-up Sequence
CPU Starts Fetching Code
SY00 Greater of
(TPU) SY10 (TOST)
(Note 1,2) or
SY11 (TPWRT)
Note 1:
2:
The power-up period will be extended if the power-up sequence completes before the device exits from BOR
(VDD < VBOR).
The power-up period includes internal voltage regulator stabilization delay.
DS70616G-page 516
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