PIC24EP256GU810-I Datasheet, PDF (504/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 32-7: DC CHARACTERISTICS: POWER-DOWN CURRENT (IPD)
DC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
-40°C  TA  +125°C for Extended
Param.
Typ.⁽²⁾
Max.
Units
Conditions
Power-Down Current (IPD)⁽¹⁾
DC60d
50
100
A
-40°C
DC60a
DC60b
60
200
250
500
A
+25°C
3.3V Base Power-Down Current^(1,4)
A
+85°C
DC60c
1600
3000
A
+125°C
DC61d
8
10
A
-40°C
DC61a
DC61b
10
12
15
20
A
A
+25°C
+85°C
3.3V Watchdog Timer Current: IWDT⁽³⁾
DC61c
13
25
A
+125°C
Note 1:
2:
3:
4:
IPD (Sleep) current is measured as follows:
• CPU core is off, oscillator is configured in EC mode and external clock is active, OSC1 is driven with
external square wave from rail-to-rail (EC Clock Overshoot/Undershoot < 250 mV required)
• CLKO is configured as an I/O input pin in the Configuration Word
• External Secondary Oscillator (SOSC) is disabled (i.e., SOSCO and SOSCI pins are configured as
digital I/O inputs)
• All I/O pins are configured as inputs and pulled to VSS
• MCLR = VDD, WDT and FSCM are disabled, all peripheral modules are disabled (PMDx bits are
all ones)
• The VREGS bit (RCON<8>) = 0 (i.e., core regulator is set to stand-by while the device is in Sleep
mode)
• RTCC is disabled
• The VREGSF bit (RCON<11>) = 0 (i.e., Flash regulator is set to stand-by while the device is in
Sleep mode)
• JTAG is disabled
Data in the “Typ” column is at 3.3V, +25ºC unless otherwise stated.
The Watchdog Timer current is the additional current consumed when the WDT module is enabled. This
current should be added to the base IPD current.
These currents are measured on the device containing the most memory in this family.
DS70616G-page 504
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