PIC24EP256GU810-I Datasheet, PDF (480/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 29-2: CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field Register RTSP Effect
Description
JTAGEN
FICD Immediate JTAG Enable bit
1 = JTAG is enabled
0 = JTAG is disabled
RSTPRI
FICD
On any Reset Target Vector Select bit
device Reset _{1 = Device will reset to Primary Flash Reset location}
0 = Device will reset to Auxiliary Flash Reset location
ICS<1:0>
FICD Immediate ICD Communication Channel Select bits
11 = Communicate on PGEC1 and PGED1
10 = Communicate on PGEC2 and PGED2
01 = Communicate on PGEC3 and PGED3
00 = Reserved, do not use
Note 1: BOR should always be enabled for proper operation (BOREN = 1).
2: This register can only be modified when code protection and write protection are disabled for both the
General and Auxiliary Segments (APL = 1, AWRP = 1, APLK = 0, GSS = 1, GWRP = 1 and GSSK = 0).
DS70616G-page 480
 2009-2012 Microchip Technology Inc.