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PIC24EP256GU810-I Datasheet, PDF (490/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
TABLE 30-2: INSTRUCTION SET OVERVIEW (CONTINUED)
Base
Instr
#
Assembly
Mnemonic
Assembly Syntax
Description
# of
# of Status Flags
Words Cycles(2) Affected
25 DAW
DAW
Wn
Wn = decimal adjust Wn
1
1
C
26 DEC
DEC
f
f=f–1
1
1
C,DC,N,OV,Z
DEC
f,WREG
WREG = f – 1
1
1
C,DC,N,OV,Z
DEC
Ws,Wd
Wd = Ws – 1
1
1
C,DC,N,OV,Z
27 DEC2
DEC2
f
f=f–2
1
1
C,DC,N,OV,Z
DEC2
f,WREG
WREG = f – 2
1
1
C,DC,N,OV,Z
DEC2
Ws,Wd
Wd = Ws – 2
1
1
C,DC,N,OV,Z
28 DISI
DISI
#lit14
Disable Interrupts for k instruction cycles 1
1
None
29 DIV
DIV.S Wm,Wn
Signed 16/16-bit Integer Divide
1
18
N,Z,C,OV
DIV.SD Wm,Wn
Signed 32/16-bit Integer Divide
1
18
N,Z,C,OV
DIV.U Wm,Wn
Unsigned 16/16-bit Integer Divide
1
18
N,Z,C,OV
30 DIVF
31 DO
32 ED
33 EDAC
DIV.UD
DIVF
DO
DO
ED
Wm,Wn
Wm,Wn(1)
#lit15,Expr(1)
Wn,Expr(1)
Wm*Wm,Acc,Wx,Wy,Wxd(1)
EDAC
Wm*Wm,Acc,Wx,Wy,Wxd(1)
Unsigned 32/16-bit Integer Divide
1
Signed 16/16-bit Fractional Divide
1
Do code to PC + Expr, lit15 + 1 times
2
Do code to PC + Expr, (Wn) + 1 times
2
Euclidean Distance (no accumulate)
1
Euclidean Distance
1
18
N,Z,C,OV
18
N,Z,C,OV
2
None
2
None
1
OA,OB,OAB,
SA,SB,SAB
1
OA,OB,OAB,
SA,SB,SAB
34 EXCH
EXCH
Wns,Wnd
Swap Wns with Wnd
1
1
None
35 FBCL
FBCL
Ws,Wnd
Find Bit Change from Left (MSb) Side
1
1
C
36 FF1L
FF1L
Ws,Wnd
Find First One from Left (MSb) Side
1
1
C
37 FF1R
FF1R
Ws,Wnd
Find First One from Right (LSb) Side
1
1
C
38 GOTO
GOTO
Expr
Go to address
2
4
None
GOTO
Wn
Go to indirect
1
4
None
GOTO.L Wn
Go to indirect (long address)
1
4
None
39 INC
INC
f
f=f+1
1
1
C,DC,N,OV,Z
INC
f,WREG
WREG = f + 1
1
1
C,DC,N,OV,Z
INC
Ws,Wd
Wd = Ws + 1
1
1
C,DC,N,OV,Z
40 INC2
INC2
f
f=f+2
1
1
C,DC,N,OV,Z
INC2
f,WREG
WREG = f + 2
1
1
C,DC,N,OV,Z
INC2
Ws,Wd
Wd = Ws + 2
1
1
C,DC,N,OV,Z
41 IOR
IOR
f
f = f .IOR. WREG
1
1
N,Z
IOR
f,WREG
WREG = f .IOR. WREG
1
1
N,Z
IOR
#lit10,Wn
Wd = lit10 .IOR. Wd
1
1
N,Z
IOR
Wb,Ws,Wd
Wd = Wb .IOR. Ws
1
1
N,Z
IOR
Wb,#lit5,Wd
Wd = Wb .IOR. lit5
1
1
N,Z
42 LAC
LAC
Wso,#Slit4,Acc
Load Accumulator
1
1
OA,OB,OAB,
SA,SB,SAB
43 LNK
LNK
#lit14
Link Frame Pointer
1
1
SFA
44 LSR
LSR
f
f = Logical Right Shift f
1
1
C,N,OV,Z
LSR
f,WREG
WREG = Logical Right Shift f
1
1
C,N,OV,Z
LSR
Ws,Wd
Wd = Logical Right Shift Ws
1
1
C,N,OV,Z
LSR
Wb,Wns,Wnd
Wnd = Logical Right Shift Wb by Wns
1
1
N,Z
LSR
Wb,#lit5,Wnd
Wnd = Logical Right Shift Wb by lit5
1
1
N,Z
45 MAC
MAC
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,AWB(1) Multiply and Accumulate
1
1
OA,OB,OAB,
SA,SB,SAB
MAC
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd(1)
Square and Accumulate
1
1
OA,OB,OAB,
SA,SB,SAB
Note 1: This instruction is available in dsPIC33EPXXX(GP/MC/MU)806/810/814 devices only.
2: Read and Read-Modify-Write (e.g., bit operations and logical operations) on non-CPU SFRs incur an additional instruction cycle.
DS70616G-page 490
 2009-2012 Microchip Technology Inc.