PIC24EP256GU810-I Datasheet, PDF (135/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
5.0 FLASH PROGRAM MEMORY
Note 1: This data sheet summarizes the features
of the dsPIC33EPXXX(GP/MC/MU)806/
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive reference source.
To complement the information in this data
sheet, refer to Section 5. “Flash Pro-
gramming” (DS70609) of the “dsPIC33E/
PIC24E Family Reference Manual”, which
is available from the Microchip web site
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
The dsPIC33EPXXX(GP/MC/MU)806/810/814 and
PIC24EPXXX(GP/GU)810/814 devices contain
internal Flash program memory for storing and
executing application code. The memory is readable,
writable and erasable during normal operation over the
entire VDD range.
Flash memory can be programmed in two ways:
• In-Circuit Serial Programming™ (ICSP™)
programming capability
• Run-Time Self-Programming (RTSP)
ICSP allows a dsPIC33EPXXX(GP/MC/MU)806/810/
814 and PIC24EPXXX(GP/GU)810/814 device to be
serially programmed while in the end application circuit.
This is done with two lines for programming clock and
programming data (one of the alternate programming
pin pairs: PGECx/PGEDx), and three other lines for
power (VDD), ground (VSS) and Master Clear (MCLR).
This allows customers to manufacture boards with
unprogrammed devices and then program the device
just before shipping the product. This also allows the
most recent firmware or a custom firmware to be
programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
application can write program memory data either in
blocks or ‘rows’ of 128 instructions (384 bytes) at a time
or a single program memory word, and erase program
memory in blocks or ‘pages’ of 1024 instructions
(3072 bytes) at a time.
5.1 Table Instructions and Flash
Programming
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register, specified in
the table instruction, as shown in Figure 5-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
FIGURE 5-1:
ADDRESSING FOR TABLE REGISTERS
24 Bits
Using
Program Counter
0
Program Counter
0
Using
Table Instruction
1/0 TBLPAG Reg
8 Bits
Working Reg EA
16 Bits
User/Configuration
Space Select
24-Bit EA
Byte
Select
 2009-2012 Microchip Technology Inc.
DS70616G-page 135