PIC24EP256GU810-I Datasheet, PDF (218/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
11.5 I/O Helpful Tips
1. In some cases, certain pins, as defined in
Table 32-9 in Section 32.0 “Electrical Charac-
teristics” under “Injection Current”, have internal
protection diodes to VDD and VSS; the term
“Injection Current” is also referred to as “Clamp
Current”. On designated pins, with sufficient exter-
nal current-limiting precautions by the user, I/O pin
input voltages are allowed to be greater or less
than the data sheet absolute maximum ratings
with respect to the VSS and VDD supplies. Note
that when the user application forward biases
either of the high or low side internal input clamp
diodes, that the resulting current being injected
into the device that is clamped internally by the
VDD and VSS power rails, may affect the ADC
accuracy by four to six counts.
2. I/O pins that are shared with any analog input pin,
(i.e., ANx, see Table 1-1 in Section 1.0 “Device
Overview”), are always analog pins by default
after any Reset. Consequently, configuring a pin
as an analog input pin, automatically disables the
digital input pin buffer and any attempt to read the
digital input level by reading PORTx or LATx will
always return a ‘0’, regardless of the digital logic
level on the pin. To use a pin as a digital I/O pin on
a shared analog pin (see Table 1-1 in Section 1.0
“Device Overview”), the user application needs
to configure the Analog Pin Configuration registers
in the I/O ports module (i.e., ANSELx) by setting
the appropriate bit that corresponds to that I/O port
pin to a ‘0’.
Note:
Although it is not possible to use a digital
input pin when its analog function is
enabled, it is possible to use the digital I/O
output function, TRISx = 0x0, while the
analog function is also enabled. However,
this is not recommended, particularly if the
analog input is connected to an external
analog voltage source, which would
create signal contention between the
analog signal and the output pin driver.
3. Most I/O pins have multiple functions. Referring to
the device pin diagrams in the data sheet, the
priorities of the functions allocated to any pins are
indicated by reading the pin name from left to right.
The left most function name takes precedence
over any function to its right in the naming conven-
tion. For example: AN16/T2CK/T7CK/RC1; this
indicates that AN16 is the highest priority in this
example and will supersede all other functions to
its right in the list. Those other functions to its right,
even if enabled, would not work as long as any
other function to its left was enabled. This rule
applies to all of the functions listed for a given pin.
Dedicated peripheral functions are always higher
priority than remappable functions. I/O pins are
always the lowest priority.
4. Each pin has an internal weak pull-up resistor and
pull-down resistor that can be configured using the
CNPUx and CNPDx registers, respectively. These
resistors eliminate the need for external resistors
in certain applications. The internal pull-up is up to
~(VDD-0.8), not VDD. This value is still above the
minimum VIH of CMOS and TTL devices.
5. When driving LEDs directly, the I/O pin can source
or sink more current than what is specified in the
VOH/IOH and VOL/IOL DC characteristic specifica-
tion. The respective IOH and IOL current rating only
applies to maintaining the corresponding output at
or above the VOH and at or below the VOL levels.
However, for LEDs, unlike digital inputs of an
externally connected device, they are not gov-
erned by the same minimum VIH/VIL levels. An I/O
pin output can safely sink or source any current
less than that listed in the absolute maximum
rating section of the data sheet. For example:
VOH = 2.4v @ IOH = -8 mA and VDD = 3.3V
The maximum output current sourced by any 8 mA
I/O pin = 12 mA.
LED source current < 12 mA is technically
permitted. Refer to the VOH/IOH graphs in
Section 32.0 “Electrical Characteristics” for
additional information.
6. The Peripheral Pin Select (PPS) pin mapping rules
are as follows:
a) Only one “output” function can be active on a
given pin at any time regardless if it is a dedi-
cated or remappable function (one pin, one
output).
b) It is possible to assign a “remappable output”
function to multiple pins and externally short or
tie them together for increased current drive.
c) If any “dedicated output” function is enabled
on a pin, it will take precedence over any
remappable “output” function.
d) If any “dedicated digital” (input or output)
function is enabled on a pin, any number of
“input” remappable functions can be mapped
to the same pin.
e) If any “dedicated analog” function(s) are
enabled on a given pin, “digital input(s)” of any
kind will all be disabled, although a single “dig-
ital output”, at the user’s cautionary discretion,
can be enabled and active as long as there is
no signal contention with an external analog
input signal. For example, it is possible for the
ADC to convert the digital output logic level, or
to toggle a digital output on a comparator or
ADC input, provided there is no external
analog input, such as for a built-in self test.
f) Any number of “input” remappable functions
can be mapped to the same pin(s) at the
same time, including any pin with a single out-
put from either a dedicated or remappable
“output”.
DS70616G-page 218
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