PIC24EP256GU810-I Datasheet, PDF (391/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
REGISTER 22-4: UxSTAT: USB STATUS REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
R-0, HSC R-0, HSC R-0, HSC R-0, HSC R-0, HSC R-0, HSC
U-0
ENDPT<3:0>⁽²⁾
DIR
PPBI⁽¹⁾
—
bit 7
U-0
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
U = Unimplemented bit, read as ‘0’
W = Writable bit
HSC = Hardware Settable/Clearable bit
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7-4
bit 3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
ENDPT<3:0>: Last Endpoint Activity Number bits
(represents the number of the endpoint BDT updated by the last USB transfer)⁽²⁾
1111 = Endpoint 15
1110 = Endpoint 14
•
•
•
0001 = Endpoint 1
0000 = Endpoint 0
DIR: Last Buffer Descriptor Direction Indicator bit
1 = The last transaction was a transmit transfer (TX)
0 = The last transaction was a receive transfer (RX)
PPBI: Ping-Pong Buffer Descriptor Pointer Indicator bit⁽¹⁾
1 = The last transaction was to the ODD buffer descriptor bank
0 = The last transaction was to the EVEN buffer descriptor bank
Unimplemented: Read as ‘0’
Note 1: This bit is only valid for endpoints with available EVEN and ODD buffer descriptor registers.
2: In Host mode, all transactions are processed through Endpoint 0 and the Endpoint 0 BDTs. Therefore,
ENDPT<3:0> will always read as ‘0000’.
 2009-2012 Microchip Technology Inc.
DS70616G-page 391