PIC24EP256GU810-I Datasheet, PDF (157/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
REGISTER 7-7: INTTREG: INTERRUPT CONTROL AND STATUS REGISTER
U-0
—
bit 15
U-0
U-0
U-0
R-0
R-0
R-0
—
—
—
ILR<3:0>
R-0
bit 8
R-0
R-0
R-0
R-0
R-0
R-0
R-0
R-0
VECNUM<7:0>⁽¹⁾
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
bit 11-8
bit 7-0
Unimplemented: Read as ‘0’
ILR<3:0>: New CPU Interrupt Priority Level bits
1111 = CPU Interrupt Priority Level is 15
•
•
•
0001 = CPU Interrupt Priority Level is 1
0000 = CPU Interrupt Priority Level is 0
VECNUM<7:0>: Vector Number of Pending Interrupt bits⁽¹⁾
11111111 = 255, Reserved
•
•
•
00001001 = 9, IC1 – Input Capture 1
00001000 = 8, INT0 – External Interrupt 0
00000111 = 7, Reserved
00000110 = 6, Generic soft error trap
00000101 = 5, DMAC error trap
00000100 = 4, Math error trap
00000011 = 3, Stack error trap
00000010 = 2, Generic hard trap
00000001 = 1, Address error trap
00000000 = 0, Oscillator fail trap
Note 1: See Table 7-1 for the complete list of interrupt vector numbers.
 2009-2012 Microchip Technology Inc.
DS70616G-page 157