PIC24EP256GU810-I Datasheet, PDF (189/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
REGISTER 9-6: ACLKDIV3: AUXILIARY CLOCK DIVISOR REGISTER 3^(1,2)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
—
—
—
—
APLLDIV<2:0>
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-3
bit 2-0
Unimplemented: Read as ‘0’
APLLDIV<2:0>: PLL Feedback Divisor bits (PLL Multiplier Ratio)
111 = 24
110 = 21
101 = 20
100 = 19
011 = 18
010 = 17
001 = 16
000 = 15 (default)
Note 1: This register resets only on a Power-on Reset (POR).
2: This register is only available on dsPIC33EPXXXMU8XX and PIC24EPXXXGU8XX devices.
 2009-2012 Microchip Technology Inc.
DS70616G-page 189