English
Language : 

PIC24EP256GU810-I Datasheet, PDF (47/622 Pages) Electronic Film Capacitors, Inc. – 16-Bit Microcontrollers and Digital Signal Controllers with High-Speed PWM, USB and Advanced Analog
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
4.0 MEMORY ORGANIZATION
Note:
This data sheet summarizes the features
of the dsPIC33EPXXX(GP/MC/MU)806/
810/814 and PIC24EPXXX(GP/GU)810/
814 families of devices. It is not intended
to be a comprehensive reference source.
To complement the information in this data
sheet, refer to Section 4. “Program
Memory” (DS70613) of the “dsPIC33E/
PIC24E Family Reference Manual”, which
is available from the Microchip web site
(www.microchip.com).
The device architecture features separate program and
data memory spaces and buses. This architecture also
allows the direct access of program memory from the
data space during code execution.
4.1 Program Address Space
The device program address memory space is 4M
instructions. The space is addressable by a 24-bit
value derived either from the 23-bit PC during program
execution, or from table operation or data space
remapping as described in Section 4.8 “Interfacing
Program and Data Memory Spaces”.
User application access to the program memory space
is restricted to the lower half of the address range
(0x000000 to 0x7FFFFF). The exception is the use of
TBLRD/TBLWT operations, which use TBLPAG<7> to
permit access to the Configuration bits and Device ID
sections of the configuration memory space.
The device program memory map is shown in
Figure 4-1.
FIGURE 4-1:
PROGRAM MEMORY MAP FOR dsPIC33EPXXX(GP/MC/MU)806/810/814 and
PIC24EPXXX(GP/GU)810/814 DEVICES(1)
dsPIC33EP256MU806/810/814 and
PIC24EP256GU810/814
GOTO Instruction(2)
Reset Address(2)
Interrupt Vector Table
User Program
Flash Memory
(87552 instructions)
Unimplemented
(Read ‘0’s)
Auxiliary Program
Flash Memory
Auxiliary Interrupt
Vector
GOTO Instruction(2)
Reset Address(2)
Reserved
Device Configuration
Registers
Reserved
Write Latch
Reserved
DEVID (2 Words)
dsPIC33EP512(GP/MC/MU)806/810/814 and
PIC24EP512(GP/GU)806/810/814
GOTO Instruction(2)
Reset Address(2)
Interrupt Vector Table
0x000000
0x000002
0x000004
0x0001FE
0x000200
User Program
Flash Memory
(175104 instructions)
0x02ABFE
0x02AC00
Unimplemented
(Read ‘0’s)
Auxiliary Program
Flash Memory
Auxiliary Interrupt
Vector
GOTO Instruction(2)
Reset Address(2)
0x0557FE
0x055800
0x7FBFFE
0x7FC000
0x7FFFF8
0x7FFFFA
0x7FFFFC
0x7FFFFE
0x800000
Reserved
Device Configuration
Registers
Reserved
Write Latch
Reserved
DEVID (2 Words)
0xF7FFFE
0xF80000
0xF80012
0xF80014
0xF9FFFE
0xFA0000
0xFA00FE
0xFA0100
0xFEFFFE
0xFF0000
0xFF0002
Reserved
Reserved
0xFFFFFE
Note 1: Memory areas are not shown to scale.
2: The Reset location is controlled by the Reset Target Vector Select bit, RSTPRI (FICD<2>). See Section 29.0 “Special Features”
for more information.
 2009-2012 Microchip Technology Inc.
DS70616G-page 47