T8207 Datasheet, PDF (97/158 Pages) Agere Systems – ATM Interconnect

Advance Data Sheet
September 2001
CelXpres T8207
ATM Interconnect
14 Registers (continued)
Table 57. RX UTOPIA Clock Configuration (RXUCCF) (010Eh)
Name
rx_utopia_clk_div
Bit Pos. Type Reset
Description
7:0 RW 01h RX UTOPIA Clock Division. The selected RX UTOPIA clock
source is divided by the number programmed in these bits as
follows:
“00000000” = reserved
“00000001” = no division
“00000010” = divide by 2
“00000011” = divide by 3
.
.
.
“11111111” = divide by 255
These bits are meaningful only when the T8207 generates the
RX UTOPIA clock.
rx_utopia_clk_src_sel 9:8 RW 0 RX UTOPIA Clock Source Select. The source of the RX
UTOPIA clock is selected via these bits as follows:
“00” = cell bus write clock
“01” = reserved
“10” = pclk
“11” = mclk
Reserved
rx_utopia_clk_en
Reserved
10 RW
11 RW
15:12 RO
These bits are meaningful only when the T8207 generates the
RX UTOPIA clock.
0 Reserved. Program to ‘0.’
0 RX UTOPIA Clock Enable. If this bit is ‘1,’ the T8207 gener-
ates the RX UTOPIA clock on the u_rxclk pin. If this bit is ‘0,’
the u_rxclk pin is configured as an input.
0 Reserved.
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