T8207 Datasheet, PDF (59/158 Pages) Agere Systems – ATM Interconnect

Advance Data Sheet
September 2001
CelXpres T8207
ATM Interconnect
10 Cell Bus Interface (continued)
10.3 Cell Bus Routing Headers
The cell bus routing header gives information about the cell and its routing. There are seven different formats for
cell bus routing headers. See Figure 16. These headers cover broadcast, multicast, and single address routing. A
T8207 device on the cell bus accepts all broadcast cells and certain multicast cells that it is configured to accept.
Broadcast or multicast routed cells may be data cells or control cells. The T8207 receiving device accepts single
address cells with an address field in its cell bus routing header that matches the device’s unit address. Cells,
routed as single address, may be data, control, or loopback cells.
MULTICAST
CONTROL CELL HEADER
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 1 ——
MULTICAST NET NUMBER
H
MULTICAST
DATA CELL HEADER
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 0 ——
MULTICAST NET NUMBER
H
SINGLE DESTINATION
DATA CELL HEADER
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 0 ———— 0
UNIT ADDRESS
H
SINGLE DESTINATION
CONTROL CELL HEADER
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 1 ———— 0
UNIT ADDRESS
H
SINGLE DESTINATION
LOOPBACK CELL HEADER
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 0 0 ——— 1
UNIT ADDRESS
H
BROADCAST
DATA CELL HEADER
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 0 1 ——— 1 —————
H
BROADCAST
CONTROL CELL HEADER
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 1 1 ——— 1 —————
H
Figure 16. Cell Bus Routing Headers
The H field (b0 to b3) is the cell bus routing header cyclic redundancy check (CRC-4) calculated over the other
12 bits (b4 to b15) of the header. It is provided for cell bus routing header error detection. When cells arrive from
the cell bus, the receiving device calculates the CRC-4 over the most significant 12 bits of the cell bus routing
header and compares its calculation to the CRC-4 value stored in the H field of the cell bus routing header. If the
two do not match, the cell is discarded.
10.3.1 Control Cells
The microprocessor connected to the T8207 may send control cells to the cell bus by writing the cell to the control
cell transmit direct memory at addresses A0h to D7h (or extended memory at addresses 0900h to 0936h). After
the cell is written to memory, the microprocessor sets the cntl_cell_wr bit in the main configuration/control register
(address 0110h). This bit returns to zero when the cell is transmitted and memory is available to load a new control
cell into the device.
Control cells accepted from the cell bus are routed to the control cell RX FIFO. The microprocessor connected to
the T8207 reads the control cell at the head of the FIFO using the control cell receive direct memory at addresses
60h to 93h (or extended memory at addresses 0800h to 0832h). After the microprocessor reads the cell, it sets the
cntl_cell_rd bit in the main configuration/control register (address 0110h) to remove the cell from the head of the
FIFO.
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