T8207 Datasheet, PDF (131/158 Pages) Agere Systems – ATM Interconnect

Advance Data Sheet
September 2001
CelXpres T8207
ATM Interconnect
14 Registers (continued)
Table 112. Manual Access State 1 (MAS1) (0424h)
Name
cas_ man
ras_ man
we_ man
bs_ man[1:0]
Reserved
Bit Pos.
0
1
2
4:3
15:5
Type
RW
RW
RW
RW
RO
Reset
Description
1 SDRAM CAS Manual Value. This is the value that will be
placed on the sd_cas* pin for one clock cycle when the
gen_man_acc bit is written to ‘1.’
1 SDRAM RAS Manual Value. This is the value that will be
placed on the sd_ras* pin for one clock cycle when the
gen_man_acc bit is written to ‘1.’
1 SDRAM Write Enable Manual Value. This is the value that
will be placed on the sd_we* pin for one clock cycle when the
gen_man_acc bit is written to ‘1.’
3h SDRAM Band Select Manual Value. This is the value that will
be placed on the sd_bs[1:0] pins for one clock cycle when the
gen_man_acc bit is written to ‘1.’
0 Reserved.
Table 113. Manual Access State 2 (MAS2) (0426h)
Name
addr_man[11:0]
Reserved
Bit Pos.
11:0
15:12
Type
RW
RO
Reset
Description
0 SDRAM Address Manual Value. This is the value that will be
placed on the sd_a[11:0] pins for one clock cycle when the
gen_man_acc bit is written to ‘1.’
0 Reserved.
Agere Systems Inc.
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