T8207 Datasheet, PDF (15/158 Pages) Agere Systems – ATM Interconnect

Advance Data Sheet
September 2001
CelXpres T8207
ATM Interconnect
2 Pin Description (continued)
Table 3. SDRAM Interface Pins
Symbol
sd_a[11:0]
sd_d[15:0]
sd_bs[1:0]
sd_ras*
sd_cas*
sd_we*
sd_clk
sd_iref
Ball
L19, L18, L20,
K20, K19, K18,
K17, J20, J19,
J18, J17, H20
F19, E20, G17,
F18, E19, D20,
E18, D19, C20
E17, D18, C19,
B20, C18, B19,
A20
H18, G20
G19
F20
G18
H19
A19
Reset
Value
X
Z
X
1
1
1
Z
—
Type
Name/Description
O SDRAM Address Lines. 7 mA drive, TTL compatible out-
put. These buffers are 50 Ω impedance matching buffers.
Long printed-wiring board traces should have 50 Ω nominal
impedance.
I/O SDRAM Data Lines. 7 mA drive, TTL compatible I/O. These
buffers are 50 Ω impedance matching buffers. Long printed-
wiring board traces should have 50 Ω nominal impedance.
O SDRAM Bank Selects. 7 mA drive, TTL compatible output.
These buffers are 50 Ω impedance matching buffers. Long
printed-wiring board traces should have 50 Ω nominal
impedance.
O SDRAM Row Address Select (Active-Low). 7 mA drive,
TTL compatible output. This buffer is a 50 Ω impedance
matching buffer. Long printed-wiring board traces should
have 50 Ω nominal impedance.
O SDRAM Column Address Select (Active-Low). 7 mA
drive, TTL compatible output. This buffer is a 50 Ω imped-
ance matching buffer. Long printed-wiring board traces
should have 50 Ω nominal impedance.
O SDRAM Write Enable (Active-Low). 7 mA drive, TTL com-
patible output. This buffer is a 50 Ω impedance matching
buffer. Long printed-wiring board traces should have 50 Ω
nominal impedance.
I/O SDRAM Clock. 7 mA drive, TTL compatible output. This
buffer is a 50 Ω impedance matching buffer. Long printed-
wiring board traces should have 50 Ω nominal impedance.
I SDRAM Current Reference. Precision current reference for
SDRAM buffers. A 1 kΩ, 1% resistor must be connected
between this pin and GND.
Agere Systems Inc.
15