T8207 Datasheet, PDF (16/158 Pages) Agere Systems – ATM Interconnect

CelXpres T8207
ATM Interconnect
Advance Data Sheet
September 2001
2 Pin Description (continued)
Table 4. Microprocessor Interface Pins
Symbol
a[7:1]
a[0]/ale
d[7:0]
sel*
wr*_ds*
rd*_rw*
int_irq*
rdy_dtack*
mot_sel
mux
Ball
W6, Y6, V7, W7,
Y7, V8, W8
Y8
U9, V9 W9, Y9,
W10, V10, Y10,
Y11
W12
V12
U12
Y12
U11
Y13
W13
Reset
Value
—
—
Z
—
—
—
0/1
Z
—
—
Type
Name/Description
I Microprocessor Port Address Lines. Most significant
7 bits of the address bus. TTL compatible input, 5 V tolerant.
I Microprocessor Port Address 0/Address Latch Enable.
Least significant bit of the address bus in nonmultiplexed
mode or address latch enable in multiplexed mode.
I/O Microprocessor Port Data Lines. 6 mA drive, TTL compat-
ible I/O, 5 V tolerant.
I Microprocessor Chip Select (Active-Low). TTL compati-
ble input, 5 V tolerant.
I Microprocessor Write/Data Strobe. Active-low write
enable in Intel mode. Active-low data strobe in Motorola
mode. TTL compatible input, 5 V tolerant.
I Microprocessor Read/Write. Active-low read enable in
Intel mode, or read/write* enable in Motorola mode, where
read is active-high and write is active-low. TTL compatible
input, 5 V tolerant.
O CPU Interrupt. Active-high in Intel mode and active-low in
Motorola mode. 4 mA drive, TTL compatible output.
O Ready/Data Transfer Acknowledge. Active-high ready sig-
nal in Intel mode and active-low data transfer acknowledge
in Motorola mode. Indicates access complete. 6 mA drive,
TTL compatible output.
I Intel/Motorola Selection. ‘0’ = Intel, ‘1’ = Motorola. TTL
compatible input, 5 V tolerant.
I Microprocessor Multiplex Select. Active-high for multiplex
mode. TTL compatible input, 5 V tolerant.
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