T8207 Datasheet, PDF (117/158 Pages) Agere Systems – ATM Interconnect

Advance Data Sheet
September 2001
CelXpres T8207
ATM Interconnect
14 Registers (continued)
Table 92. Routing Information 3 (RI3) (0204h)
Name
prior0_sel[5:0]
prior1_sel[5:0]
Reserved
Bit Pos.
5:0
11:6
Type
RW
RW
Reset
Description
X Priority 0 Select.
The prior0_sel[5:0] bit field selects which bit of the cell header, the
cell bus routing header, or the tandem routing header is used as
this priority bit.
X Priority 1 Select.
The prior1_sel[5:0] bit field selects which bit of the cell header, the
cell bus routing header, or the tandem routing header is used as
this priority bit.
15:12 RO
Priority 0 and 1 Select.
The port group address bits are used to determine the queue
group to which the cell is directed. The priority select bits are used
to determine the queue in the queue group to which the cell is
directed. The prior1_sel[5:0] bits select the most significant bit of
the priority number in the specified group, and the prior0_sel[5:0]
bits select the least significant bit of the priority number. A value of
zero to 31 selects bits in the cell header where zero is the CLP bit
and 31 is the most significant bit of the GFC/VPI field. A value of
32 to 47 selects bits in the tandem routing header where 32 is the
least significant bit and 47 is the most significant bit. A value of 48
to 63 selects bits in the cell bus routing header where 48 is the
least significant bit and 63 is the most significant bit. The value,
“110000,” is a special case and may be used to force the value of
this bit to ‘0.’ If this bit is forced to zero, the bit position in the
resultant pointer is always ‘0’ and is not extracted from the
received cell.
0 Reserved.
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