T8207 Datasheet, PDF (110/158 Pages) Agere Systems – ATM Interconnect

CelXpres T8207
ATM Interconnect
Advance Data Sheet
September 2001
14 Registers (continued)
Table 84. Slave Queue 0 (SQ0) (016Ch)
Name
slav_queue_in[31:16]
Bit Pos. Type Reset
Description
15:0 RW
0 Slave Queue Indication [31:16]. The bits in this register are
used only in shared UTOPIA mode, and only 32 queues are
supported in shared UTOPIA mode. Each bit in this field rep-
resents one of the upper 16 queues from these 32 queues in
the slave device, where the least significant bit is queue 16,
and most significant bit is queue 31. These bits indicate
which queues in the slave device are enabled for shared
UTOPIA mode. If the associated bit is ‘1,’ it indicates to the
master that the queue is enabled. These bits are only mean-
ingful in shared UTOPIA mode and must be programmed in
the master device.
Note: Shared UTOPIA mode supports up to 32 queues only.
Table 85. Slave Queue 1 (SQ1) (016Eh)
Name
slav_queue_in[15:0]
Bit Pos. Type Reset
Description
15:0 RW
0 Slave Queue Indication [15:0]. The bits in this register are
used only in shared UTOPIA mode, and only 32 queues are
supported in shared UTOPIA mode. Each bit in this field rep-
resents one of the lower 16 queues from these 32 queues in
the slave device, where the least significant bit is queue 0,
and most significant bit is queue 15. These bits indicate
which queues in the slave device are enabled for shared
UTOPIA mode. If the associated bit is ‘1,’ it indicates to the
master that the queue is enabled. These bits are only mean-
ingful in shared UTOPIA mode and must be programmed in
the master device.
Note: Shared UTOPIA mode supports up to 32 queues only.
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